Person:

Wong, C. P.

Permanent Link

https://hdl.handle.net/1853/71846

Associated Organization(s)

Organizational Unit

School of Materials Science and Engineering

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Publication Search Results

Now showing 1 - 10 of 14

Surface Property of Passivation Layer on Integrated Circuit Chip and Solder Mask Layer on Printed Circuit Board

(Georgia Institute of Technology, 2003-10) Wong, C. P. ; Luo, Shijian

Adhesion of underfill to passivation layer on integrated circuit chip and solder mask layer on printed circuit board is critical to the reliability of an underfilled flip chip package. In this study, the surface properties of solder mask and four passivation materials: benzocyclobutene (BCB), polyimide (PI), silicon dioxide (SiO₂)and silicon nitride (SiN) were investigated. A combination of both wet and dry cleaning processes was very effective to remove contaminants from the surface. The element oxygen, introduced during O₂plasma treatment or UV/O₃treatment, led to the increase of the base component of surface tension. X-ray photoelectron spectroscopy (XPS) experiments confirmed the increase of oxygen concentration at the surface after UV/O₃treatment. Wetting of underfill on passivation and solder mask was slightly improved at higher temperatures. Although UV/O₃ cleaning and O₂plasma treatment significantly improved the wetting of underfill on passivation materials, they did not improve adhesion strength of epoxy underfill to passivation. Therefore, the wetting was not the controlling factor in adhesion of the system studied.
Improved Stability of Contact Resistance of Low Melting Point Alloy Incorporated Isotropically Conductive Adhesives

(Georgia Institute of Technology, 2003-06) Wong, C. P. ; Moon, Kyoung-Sik ; Wu, Jiali

With the driving force of “green” revolution in the electronics industry, tremendous efforts have been made in pursuing lead-free alternatives. Although lately lead-free alloys have drawn a lot of attention, their technical weaknesses, such as high processing temperature, poor wetting and high surface tension, limit their applications on the thermally sensitive, flexible, nonsolderable substrates and the ultra-fine pitch size flip chip interconnection. Conventional isotropically conductive adhesives (ICAs) have been used widely in surface mount and die-attach technologies for electrical interconnection and heat dissipation. The low temperature processing of ICAs is one of the major advantages over lead-free solders, which brings a low system stress, simple manufacture process and the like. In order to enhance the contact resistance of ICAs, the low melting point alloy (LMA) incorporating technology has been developed by our group. In this paper, LMA fusing methods were studied, since nonfused LMA in ICAs after a curing process can adversely affect the physical property and contact resistance stability. A differential scanning calorimeter (DSC) was used for the basic examination of depleting rate of LMAs in the typical ICAs. The cross-sectional morphology, LMA distribution and intermetallic compound were investigated by a scanning electron microscope (SEM). In addition, contact resistance for the ICA formulation incorporated with LMAs under elevated temperature and humidity was evaluated.
Development of New No-Flow Underfill Materials for Both Eutectic Sn-Pb Solder and a High Temperature Melting Lead-Free Solder

(Georgia Institute of Technology, 2003-06) Wong, C. P. ; Li, Haiying ; Johnson, Ashanti

In recent years, no-flow underfill technology has drawn more attention due to its potential cost-savings advantages over conventional underfill technology, and as a result several no-flow underfill materials have been developed and reported. However, most of these materials are not suitable for lead-free solder, such as Sn/Ag (m.p. 225°C), Sn/Ag/Cu (m.p. 217°C), applications that usually have higher melting temperatures than the eutectic Sn-Pb solder (m.p. 183°C). Due to the increasing environmental concern, the demand for friendly lead-free solders has become an apparent trend. This paper demonstrates a study on two new formulas of no-flow underfill developed for lead-free solders with a melting point around 220°C. As compared to the G25, a no-flow underfill material developed in our research group, which uses a solid metal chelate curing catalyst to match the reflow profile of eutectic Sn-Pb solder, these novel formulas employ a liquid curing catalyst thus provides ease in preparation of the no-flow underfill materials. In this study, curing kinetics, glass transition temperature (Tg), thermal expansion coefficient (TCE), storage modulus (E [superscript v]) and loss modulus (E″) of these materials were studied with a differential scanning calorimetry (DSC), a thermo-mechanical analysis (TMA), and a dynamic-mechanical analysis (DMA), respectively. The pot-life in terms of viscosity of these materials was characterized with a stress rheometer. The adhesive strength of the materials on the surface of silicon chips were studied with a die-shear instrument. The influences of fluxing agents on the materials curing kinetics were studied with a DSC. The materials compatibility to the solder penetration and wetting on copper clad during solder reflow was investigated with both eutectic Sn-Pb and 95.9Sn/3.4Ag/0.7Cu solders on copper laminated FR-4 organic boards.
Double-Layer No-Flow Underfill Materials and Process

(Georgia Institute of Technology, 2003-05) Wong, C. P. ; Zhang, Zhuqing

The no-flow underfill has been invented and practiced in the industry for a few years. However, due to the interfering of silica fillers with solder joint formation, most no-flow underfills are not filled with silica fillers and hence have a high coefficient of thermal expansion (CTE), which is undesirable for high reliability. In a novel invention, a double-layer no-flow underfill is implemented to the flip-chip process and allows fillers to be incorporated into the no-flow underfill. The effects of bottom layer underfill thickness, bottom layer underfill viscosity, and reflowprofile on the solder wetting properties are investigated in a design of experiment (DOE) using quartz chips. It is found that the thickness and viscosity of the bottom layer underfill are essential to the wetting of the solder bumps. Chip scale package (CSP) components are assembled using the double-layer no-flow underfill process. Silica fillers of different sizes and weight percentages are incorporated into the upper layer underfill. With a high viscosity bottom layer underfill, up to 40 wt% fillers can be added into the upper layer underfill and do not interfere with solder joint formation.
Adhesion Evaluation on Low-Cost Alternatives to Thermosetting Epoxy Encapsulants

(Georgia Institute of Technology, 2003-04) Wong, C. P. ; Fan, Lianhua

The thermosetting epoxy curing systems have been widely used as encapsulants in the electronic packaging industry. With the continual evolving of electronic product markets, material suppliers have been challenged to provide more options to meet the requirements of advanced, yet cost effective, packaging solutions. In this paper, two low-cost alternative materials have been investigated experimentally regarding their adhesion and reliability performance, and these have then been compared with the thermosetting epoxy systems. One of the materials is thermoplastic bisphenol A epoxy/phenoxy resin, and the other is an interpenetrating polymer network composed of an epoxy curing component and a free radical polymerizable component. Some formulations of the materials being studied could exhibit excellent adhesion, durability and application reliability. While reworkability is expected for these materials, they are promising as cost effective encapsulants for electronic packaging, and may be applied with appropriate processing techniques.
Double-Layer No-Flow Underfill Process for Flip-Chip Applications

(Georgia Institute of Technology, 2003-03) Zhang, Zhuqing ; Lu, Jicun ; Wong, C. P.

No-flow underfill technology shows potential advances over the conventional underfill technology toward a low-cost flop-chip underfill process. However, due to the filler entrapment in between solder bumps and contact pads on board, no-flow underfills are mostly unfilled or filled with very low filler loading. The high coefficient of thermal expansion (CTE) of the polymer material has significantly lowered the reliability of flip chip assembly and has limited its application to large chip assemblies. This paper presents a double-layer no-flow underfill process approach to incorporate silica filler into a no-flow underfill. Two layers of underfills are applied on to the substrate before chip placement. The bottom underfill layer facing the substrate is fluxed and unfilled; the upper layer facing the chip is filled with silica fillers. The total filler loading of the mixture is estimated to be around 55 wt%. The material properties of each layer of underfills, the underfill mixture, and a control unfilled underfill are characterized using differential scanning calorimeter (DCS), thermo-mechanical analyzer (TMA), dynamic mechanical analyzer (DMA), and a stress rheometer. FB250 daisy-chained test chips are assembled on FR-4 boards using the novel approach. A 100% assembly yield of solder Interconnect is achieved with the double-layer no-flow underfill while in the single-layer no-flow underfill process, no solder joint yield is observed. Scanning electronic microscope (SEM) and optical microscope are used to investigate the cross-section of both assemblies. A US provisional patent has been filed for this invention.
An Improvement of Thermal Conductivity of Underfill Materials for Flip-Chip Packages

(Georgia Institute of Technology, 2003-02) Wong, C. P. ; Li, Haiying ; Jacob, Karl I.

Effective heat dissipation is crucial to enhance the performance and reliability of electronic devices. In this work, the performance of encapsulants filled with carbon fiber was studied and compared with silica filled encapsulants. Encapsulants filled with mixed combination of fillers for optimizing key properties were also investigated. The thermal and electrical conductivities were investigated and glass transition temperature (Tg), thermal expansion coefficient (TCE), and storage modulus ( ) of these materials were studied with thermal analysis methods. The composites filled with both carbon fiber and silica showed an increase of thermal conductivity three to five times of that of silica filled encapsulants of the same filler loading while maintaining/enhancing major mechanical and thermal properties.
Study on Underfill/Solder Adhesion in Flip-Chip Encapsulation

(Georgia Institute of Technology, 2002-11) Wong, C. P. ; Fan, Lianhua ; Tison, Christopher K.

Underfill materials are employed in flip-chip assemblies to enhance solder joint reliability performance. The adhesion of underfills with solders is important to the integrity of the flip-chip structure. We have studied the adhesion strength of two underfill samples with tin/lead (Sn/Pb) eutectic solder and tin/copper (Sn/Cu) lead-free solder, benchmarked with a copper surface. It was found that the adhesion of underfills and both solder materials was about 1/3 of the adhesion between underfills and copper. The effect of temperature and humidity aging as well as flux residue on adhesion strength was also investigated. A loss of adhesion was observed after the pressure cooker test, but 85 ℃/85% RH aging and flux residue revealed only a slight influence on adhesion strength. Surface analysis was performed on solid surfaces including copper, Sn/Pb eutectic solder, Sn/Cu lead-free solder and cured underfills by using the three-liquid-probe three-component surface tension method with a goniometer. The surface tension of liquid underfills was measured by the pendent drop method, and their contact angles on copper, Sn/Pb eutectic solder and Sn/Cu lead-free solder were also measured with a goniometer. The thermodynamic work of adhesion for underfills with copper and solder surfaces of different conditions was then calculated following these two surface analysis approaches. It was found that the thermodynamic work of adhesion was not correlated with the lap shear strength of underfills with copper and solder materials. Thus, the wetting property of an underfill on a substrate is not the determining factor for its practical adhesion strength. Various possible techniques for improving the adhesion of underfills and solder materials were then considered, and the use of additives in underfill formulations was experimented. However, we have not observed any significant effect of adhesion strength enhancement from any of these additives. Further tests of these additives with the base underfill formulation seemed to reveal a slight possibility to enhance adhesion of underfills and solders by proper manipulation of the underfill and/or flux formulation.
Development of High Performance Interfill Materials for System Chips Technology

(Georgia Institute of Technology, 2002-06) Wong, C. P. ; Wu, Jiali ; Bhattacharya, Swapan ; Lloyd, Courtney ; Pogge, H. Bernhard ; Tummala, Rao R.

An innovative precisely interconnected chip (PIC) technology is currently under development at IBM to seek more effective means of creating system chips. The objective of this research is developing fabrication methods to permit the realization of high yielding large area chips, as well as chips that may contain very diverse technologies. This paper reports the use of a high-performance interfill material based on epoxy resin, which is used to connect the different chip sector macros that make up the system chip. This novel interfill material remains thermally stable through the subsequent processing temperature hierarchies during the interchip interconnection fabrication. Spherical SiO2 powders are incorporated into the epoxy resin to improve its mechanical properties, reduce coefficient of thermal expansion, and increase thermal conductivity. Adhesion and rheology of the formulated interfill materials are evaluated. Microstructure of SiO2 filled epoxy system is also investigated to confirm the reliability of the composite before and after thermal aging. Initial results indicate that the formulated EPOXY A resin composite is qualified for the system chip manufacturing process in terms of the dispensing processability, structural and mechanical integrity, and reliability.
Development of New Low Stress Epoxies for MEMS Device Encapsulation

(Georgia Institute of Technology, 2002-06) Wong, C. P. ; Wu, Jiali

In this study, a series of new low stress epoxies was introduced as conformal encapsulants, which show a high promise to meet all the requirements for the protection of the pressure sensor system. Mechanical properties such as initial Young’s modulus, toughness and ultimate tensile stress were evaluated. The more critical issue of material’s contamination resistance to the jet fuel was improved. And the mechanism behind materials lowstress and toughness behaviors was investigated from the viewpoint of microstructure.