Title:
Adaptive FPGA-based Test Module
Adaptive FPGA-based Test Module
Author(s)
Chatterjee, Abhijit
Keezer, David C.
Keezer, David C.
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Abstract
The objective of the project is to develop methods and electronics for testing multi-GHz digital components (such as DDR memories), using low-cost methods based on state-of-the-art field programmable gate arrays (FPGAs). A further objective is to incorporate the means for the test electronics to “self-monitor” its own performance, and to “adapt” its behavior (performance) in order to optimize the quality of the test signals. Therefore this project seeks to realize two major benefits as compared to traditional testing methods: (1) lower test equipment cost and (2) improved test signal quality (especially for high-speed signals). This report describes the activities and preliminary results obtained during the first six months of this project.
Sponsor
Samsung
Date Issued
2013-05-30
Extent
Resource Type
Text
Resource Subtype
Technical Report