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OSP Final Research Reports

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Now showing 1 - 10 of 415
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Exploration of the energy and thermal behaviors of emerging architectures

2014-09-30 , Yalamanchili, Sudhakar , Kim, Hyesoon

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Adaptive FPGA-based Test Module

2013-05-30 , Chatterjee, Abhijit , Keezer, David C.

The objective of the project is to develop methods and electronics for testing multi-GHz digital components (such as DDR memories), using low-cost methods based on state-of-the-art field programmable gate arrays (FPGAs). A further objective is to incorporate the means for the test electronics to “self-monitor” its own performance, and to “adapt” its behavior (performance) in order to optimize the quality of the test signals. Therefore this project seeks to realize two major benefits as compared to traditional testing methods: (1) lower test equipment cost and (2) improved test signal quality (especially for high-speed signals). This report describes the activities and preliminary results obtained during the first six months of this project.

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VR-in-a-box: Surgical simulator - supplementing surgical training for medical students using a low-cost virtual reality simulator with real-time haptic feedback

2012-12-16 , Howard, Ayanna M.

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Understanding and exploiting the effects of loading on ultrasonic sensing systems for structural health monitoring

2012-03-31 , Michaels, Jennifer E. , Michaels, Thomas E. , Lee, Sang Jun , Chen, Xin , Gandhi, Navneet , Shi, Fan

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Development of a label free glycan arrays for the detection of prostate cancer

2014-04 , Adibi, Ali

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Advanced middle-UV coherent optical sources

2013-02 , Dupuis, Russell D.

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Functional integrated phononic crystal structures for wireless applications

2012-08 , Adibi, Ali

This NSF-supported research is directed toward realizing and characterizing two-dimensional (2D) periodic structures with embedded acoustic wave scatterers in a background solid slab for integrable acoustic wave devices for communications applications. To achieve this goal, as was suggested in our original proposal, our approach can be summarized in the following four categories: 1) Development of high performance fundamental PnC devices (cavities and waveguides) 2) Development of functional PnC slab devices based on the PnC slabs cavities and waveguides 3) Development of optimized fabrication processes for PnC structures 4) Characterization of PnC devices

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Physical modeling of low-k dielectric breakdown and the estimation

2013-08 , Milor, Linda S.

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Neuronal determinants of respiratory rhythmogenesis

2013 , Butera, Robert J.

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Targeting multi-core clock performance gains: vertically integrated adaptation and prototyping

2012-06 , Chatterjee, Abhijit

A low cost post-manufacturing testing and speed tuning methodology is proposed in a multi-processor system. The goal of this research is to develop a methodology that allows the “safe” speed of each core in a large CMP to be determined under the assumption that some speed defects and design bugs are likely to escape conventional delay testing procedures.

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