Title:
CUDA performance analyzer
CUDA performance analyzer
| dc.contributor.advisor | Kim, Hyesoon | |
| dc.contributor.author | Dasgupta, Aniruddha | en_US |
| dc.contributor.committeeMember | Vuduc, Richard | |
| dc.contributor.committeeMember | Yalamanchili, Sudhakar | |
| dc.contributor.department | Electrical and Computer Engineering | en_US |
| dc.date.accessioned | 2011-07-06T16:46:42Z | |
| dc.date.available | 2011-07-06T16:46:42Z | |
| dc.date.issued | 2011-04-05 | en_US |
| dc.description.abstract | GPGPU Computing using CUDA is rapidly gaining ground today. GPGPU has been brought to the masses through the ease of use of CUDA and ubiquity of graphics cards supporting the same. Although CUDA has a low learning curve for programmers familiar with standard programming languages like C, extracting optimum performance from it, through optimizations and hand tuning is not a trivial task. This is because, in case of GPGPU, an optimization strategy rarely affects the functioning in an isolated manner. Many optimizations affect different aspects for better or worse, establishing a tradeoff situation between them, which needs to be carefully handled to achieve good performance. Thus optimizing an application for CUDA is tough and the performance gain might not be commensurate to the coding effort put in. I propose to simplify the process of optimizing CUDA programs using a CUDA Performance Analyzer. The analyzer is based on analytical modeling of CUDA compatible GPUs. The model characterizes the different aspects of GPU compute unified architecture and can make prediction about expected performance of a CUDA program. It would also give an insight into the performance bottlenecks of the CUDA implementation. This would hint towards, what optimizations need to be applied to improve performance. Based on the model, one would also be able to make a prediction about the performance of the application if the optimizations are applied to the CUDA implementation. This enables a CUDA programmer to test out different optimization strategies without putting in a lot of coding effort. | en_US |
| dc.description.degree | M.S. | en_US |
| dc.identifier.uri | http://hdl.handle.net/1853/39555 | |
| dc.publisher | Georgia Institute of Technology | en_US |
| dc.subject | GPU | en_US |
| dc.subject | CUDA | en_US |
| dc.subject | Analytical modeling | en_US |
| dc.subject | GPGPU | en_US |
| dc.subject | Optimization | en_US |
| dc.subject | Performance prediction | en_US |
| dc.subject | Fast multipole method | en_US |
| dc.subject | Performance analysis | en_US |
| dc.subject | Ocelot | en_US |
| dc.subject.lcsh | Graphics processing units | |
| dc.subject.lcsh | Computer graphics | |
| dc.subject.lcsh | Application software | |
| dc.title | CUDA performance analyzer | en_US |
| dc.type | Text | |
| dc.type.genre | Thesis | |
| dspace.entity.type | Publication | |
| local.contributor.advisor | Kim, Hyesoon | |
| local.contributor.corporatename | School of Electrical and Computer Engineering | |
| local.contributor.corporatename | College of Engineering | |
| relation.isAdvisorOfPublication | ec222ec7-e853-445c-b356-51b942d36799 | |
| relation.isOrgUnitOfPublication | 5b7adef2-447c-4270-b9fc-846bd76f80f2 | |
| relation.isOrgUnitOfPublication | 7c022d60-21d5-497c-b552-95e489a06569 |
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