Recent Advances in Flip-Chip Underfill: Materials, Process, and Reliability

dc.contributor.author Wong, C. P.
dc.contributor.author Zhang, Zhuqing
dc.date.accessioned 2006-08-28T16:29:42Z
dc.date.available 2006-08-28T16:29:42Z
dc.date.issued 2004-08
dc.description ©2004 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or distribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. en
dc.description.abstract In order to enhance the reliability of a flip-chip on organic board package, underfill is usually used to redistribute the thermomechanical stress created by the coefficient of thermal expansion (CTE) mismatch between the silicon chip and organic substrate. However, the conventional underfill relies on the capillary flow of the underfill resin and has many disadvantages. In order to overcome these disadvantages, many variations have been invented to improve the flip-chip underfill process. This paper reviews the recent advances in the material design, process development, and reliability issues of flip-chip underfill, especially in no-flow underfill, molded underfill, and wafer-level underfill. The relationship between the materials, process, and reliability in these packages is discussed. en
dc.format.extent 830600 bytes
dc.format.mimetype application/pdf
dc.identifier.citation IEEE Transactions on Advanced Packaging, Vol. 27, no. 3, August 2004, 515-524 en
dc.identifier.uri http://hdl.handle.net/1853/11437
dc.language.iso en_US en
dc.publisher Georgia Institute of Technology en
dc.publisher.original Institute of Electrical and Electronics Engineers, Inc., New York
dc.subject Flip-chip devices en
dc.subject Interconnect en
dc.subject Materials en
dc.subject Reliability en
dc.subject Underfill en
dc.title Recent Advances in Flip-Chip Underfill: Materials, Process, and Reliability en
dc.type Text
dc.type.genre Article
dspace.entity.type Publication
local.contributor.author Wong, C. P.
local.contributor.corporatename School of Materials Science and Engineering
local.contributor.corporatename College of Engineering
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relation.isOrgUnitOfPublication 7c022d60-21d5-497c-b552-95e489a06569
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