Title:
Adaptive transaction scheduling for transactional memory systems
Adaptive transaction scheduling for transactional memory systems
| dc.contributor.advisor | Lee, Hsien-Hsin Sean | |
| dc.contributor.author | Yoo, Richard M. | en_US |
| dc.contributor.committeeMember | Blough, Douglas M. | |
| dc.contributor.committeeMember | Yalamanchili, Sudhakar | |
| dc.contributor.department | Electrical and Computer Engineering | en_US |
| dc.date.accessioned | 2008-06-10T20:38:56Z | |
| dc.date.available | 2008-06-10T20:38:56Z | |
| dc.date.issued | 2008-04-01 | en_US |
| dc.description.abstract | Transactional memory systems are expected to enable parallel programming at lower programming complexity, while delivering improved performance over traditional lock-based systems. Nonetheless, there are certain situations where transactional memory systems could actually perform worse. Transactional memory systems can outperform locks only when the executing workloads contain sufficient parallelism. When the workload lacks inherent parallelism, launching excessive transactions can adversely degrade performance. These situations will actually become dominant in future workloads when large-scale transactions are frequently executed. In this thesis, we propose a new paradigm called adaptive transaction scheduling to address this issue. Based on the parallelism feedback from applications, our adaptive transaction scheduler dynamically dispatches and controls the number of concurrently executing transactions. In our case study, we show that our low-cost mechanism not only guarantees that hardware transactional memory systems perform no worse than a single global lock, but also significantly improves performance for both hardware and software transactional memory systems. | en_US |
| dc.description.degree | M.S. | en_US |
| dc.identifier.uri | http://hdl.handle.net/1853/22587 | |
| dc.publisher | Georgia Institute of Technology | en_US |
| dc.subject | Parallelism | en_US |
| dc.subject | Performance | en_US |
| dc.subject | Transaction effectiveness | en_US |
| dc.subject | Contention intensity | en_US |
| dc.subject.lcsh | Transaction systems (Computer systems) | |
| dc.subject.lcsh | Threads (Computer programs) | |
| dc.subject.lcsh | Parallel programming (Computer science) | |
| dc.subject.lcsh | Synchronization | |
| dc.title | Adaptive transaction scheduling for transactional memory systems | en_US |
| dc.type | Text | |
| dc.type.genre | Thesis | |
| dspace.entity.type | Publication | |
| local.contributor.corporatename | School of Electrical and Computer Engineering | |
| local.contributor.corporatename | College of Engineering | |
| relation.isOrgUnitOfPublication | 5b7adef2-447c-4270-b9fc-846bd76f80f2 | |
| relation.isOrgUnitOfPublication | 7c022d60-21d5-497c-b552-95e489a06569 |
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