Title:
Energy Introspector: Coordinated Architecture-Level Simulation of Processor Physics
Energy Introspector: Coordinated Architecture-Level Simulation of Processor Physics
Author(s)
Song, William J.
Mukhopadhyay, Saibal
Rodrigues, Arun
Yalamanchili, Sudhakar
Mukhopadhyay, Saibal
Rodrigues, Arun
Yalamanchili, Sudhakar
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Abstract
Increased power and heat dissipation in
microprocessors impose limitations on performance scaling.
Power and thermal management techniques coupled with
workload dynamics cause increasing spatiotemporal variations
in electrical and thermal stresses. The coupling between various
physical phenomena (e.g., power, temperature, reliability,
delay) will be critical to microarchitectural operations in
future processors. Thus, we need modeling tools to enable the
exploration of such physical interactions and drive development
of microarchitectural solutions. This paper introduces a novel
framework, Energy Introspector (EI), for the coordinated
simulation of microarchitecture and physics models. The EI
framework features flexible modeling of processor component
hierarchy that enables simulating different microarchitecture
and package designs. The proposed framework uses standardized
interface to drive different implementations of physics models
and captures their interactions. The EI supports parallel
computation of models in anticipation of large-scale simulations
(e.g., high core-count processors). We present a case study using
the EI framework to assess reliability and performance tradeoffs
with a full-system cycle-level simulation of an asymmetric chip
multiprocessor (ACMP).
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Date Issued
2013
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Text
Resource Subtype
Technical Report