(Georgia Institute of Technology, 2002)
Banakar, Rajeshwari; Ekpanyapong, Mongkol; Puttaswamy, Kiran; Rabbah, Rodric Michel; Balakrishnan, M.; Mooney, Vincent John, III; Palem, Krishna V.
In this paper a system level energy model called TRIREME, is presented for HPL-PD microarchitecture which is used in Trimaran Compiler framework studies. The number of accesses for the various computational units are obtained from the trimaran framework, which gives the performance estimates also. We focus on the details of the HPL PD at the microarchitectural level and how the energy models for the processor are constructed. Our system level energy model can be used in Trimaran framework for energy-aware computing, to validate the compiler techniques for the benefits of energy saving due to introduction of a specific compiler optimization.