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CERCS Technical Report Series
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Security Refresh: Prevent Malicious Wear-out and Increase Durability for Phase-Change Memory with Dynamically Randomized Address Mapping
Adaptive Transaction Scheduling for Transactional Memory Systems
Intelligent Cache Management by Exploiting Dynamic UTI/MTI Behavior
Thermal-aware 3D Microarchitectural Floorplanning
Chameleon: Virtualizing Idle Acceleration Cores of A Heterogeneous Multi-Core Processor for Caching and Prefetching
A Floorplan-Aware Dynamic Inductive Noise Controller for Reliable 2D and 3D Microprocessors
High Speed Memory Centric Protection on Software Execution Using One-Time-Pad Prediction
POD: A Parallel-On-Die Architecture
SoftCache: Dynamic Optimizations for Power and Area Reduction in Embedded Systems (II)
Architecture Support for High Speed Protection of Memory Integrity and Confidentiality in Symmetric Multiprocessor Systems