Title:
ILP-based Supply and Threshold Voltage Assignment For Total Power Minimization
ILP-based Supply and Threshold Voltage Assignment For Total Power Minimization
dc.contributor.author | Ekpanyapong, Mongkol | |
dc.contributor.author | Korkmaz, Pinar | |
dc.contributor.author | Lim, Sung Kyu | |
dc.date.accessioned | 2008-02-26T21:55:54Z | |
dc.date.available | 2008-02-26T21:55:54Z | |
dc.date.issued | 2007 | |
dc.description.abstract | In this paper we present an ILP-based method to simultaneously assign supply and threshold voltages to individual gates for dynamic and leakage power minimization. In our three-step approach, low power min-flipflop (FF) retiming is first performed to reduce the clock period while taking the FF delay/power into consideration. Next, the subsequent voltage assignment formulated in ILP makes the best possible supply/threshold voltage assignment under the given clock period constraint set by the retiming. Finally, a post-process further refines the voltage assignment solution by exploiting the remaining timing slack in the circuit. Related experiments show that the min-FF retiming plus simultaneous Vdd/Vth assignment approach outperforms the existing max-FF retiming plus Vdd-only assignment approach. | en_US |
dc.identifier.uri | http://hdl.handle.net/1853/20110 | |
dc.language.iso | en_US | en_US |
dc.publisher | Georgia Institute of Technology | en_US |
dc.relation.ispartofseries | CERCS; GIT-CERCS-07-16 | en_US |
dc.subject | Integer linear programming | en_US |
dc.subject | Linear programming | en_US |
dc.subject | Post refinement | en_US |
dc.subject | Power minimization | en_US |
dc.subject | Retiming | en_US |
dc.subject | Voltage assignment | en_US |
dc.subject | Voltages | en_US |
dc.title | ILP-based Supply and Threshold Voltage Assignment For Total Power Minimization | en_US |
dc.type | Text | |
dc.type.genre | Technical Report | |
dspace.entity.type | Publication | |
local.contributor.author | Lim, Sung Kyu | |
local.contributor.corporatename | Center for Experimental Research in Computer Systems | |
local.relation.ispartofseries | CERCS Technical Report Series | |
relation.isAuthorOfPublication | 31bc3e86-9942-4b3f-aeae-783bb95052ff | |
relation.isOrgUnitOfPublication | 1dd858c0-be27-47fd-873d-208407cf0794 | |
relation.isSeriesOfPublication | bc21f6b3-4b86-4b92-8b66-d65d59e12c54 |