Title:
Design methods for self-repairing digital logic

dc.contributor.advisor Keezer, David C.
dc.contributor.author Yang, Jingchi
dc.contributor.committeeMember Milor, Linda
dc.contributor.committeeMember Madisetti, Vijay
dc.contributor.committeeMember Jayaraman, Sundaresan
dc.contributor.committeeMember Chatterjee, Abhijit
dc.contributor.department Electrical and Computer Engineering
dc.date.accessioned 2020-01-14T14:47:31Z
dc.date.available 2020-01-14T14:47:31Z
dc.date.created 2019-12
dc.date.issued 2019-11-07
dc.date.submitted December 2019
dc.date.updated 2020-01-14T14:47:31Z
dc.description.abstract A systematic approach for the design of self-testable, self-correcting, self-repairing and self-healing digital systems was proposed. This self-test/self-repair methodology is accomplished autonomously, in a distributed fashion, so that it can scale as the size of the system grows. Modular redundancy and re-programmability are exploited to accomplish generic self-test (applicable to nearly any application) and to enable self-repair in general, and self-healing in FPGAs. Error rates are measured throughout the design to distinguish between transient errors and permanent or semi-permanent logic faults. Original logic design is automatically transformed to this self-healing architecture via customizable software. Logic reconfiguration occurs automatically, replacing failing logic modules so that the system continues to operate error-free while partial dynamic reconfiguration is used to heal failing logic (in the case of soft faults in FPGAs). Various digital designs of different scales are implemented and examined under random error injection. The test results demonstrate the effectiveness of this design.
dc.description.degree Ph.D.
dc.format.mimetype application/pdf
dc.identifier.uri http://hdl.handle.net/1853/62326
dc.publisher Georgia Institute of Technology
dc.subject Fault-tolerant
dc.subject Self-repair
dc.title Design methods for self-repairing digital logic
dc.type Text
dc.type.genre Dissertation
dspace.entity.type Publication
local.contributor.corporatename School of Electrical and Computer Engineering
local.contributor.corporatename College of Engineering
relation.isOrgUnitOfPublication 5b7adef2-447c-4270-b9fc-846bd76f80f2
relation.isOrgUnitOfPublication 7c022d60-21d5-497c-b552-95e489a06569
thesis.degree.level Doctoral
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