Person:
Wong, C. P.

Associated Organization(s)
ORCID
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Publication Search Results

Now showing 1 - 2 of 2
  • Item
    High Performance No-Flow Underfills for Low-Cost Flip-Chip Applications: Material Characterization
    (Georgia Institute of Technology, 1998-09) Wong, C. P. ; Shi, Songhua ; Jefferson, G.
    Underfill encapsulant is critical to the reliability of the flip-chip solder joint interconnects. Novel no-flow underfill encapsulant is an attractive flip-chip encapsulant due to the simplification of the no-flow underfilling process. To develop the no-flow underfill material suitable for the no-flow underfilling process of flip-chip solder joint interconnects, we have studied and developed a series of metal chelate latent catalysts for the no-flow underfill formulation. The latent catalyst has minimal reaction with the epoxy resin cycloaliphatic type epoxy) and the crosslinker (or hardener) at the low temperature (< 180 ℃) prior to the solder reflow and then rapid reaction takes place to form the low-cost high performance underfills. The effects of the concentration of the hardener and catalyst on the curing profile and physical properties of the cured formulations were studied. The kinetics and exothermic heat of the curing reactions of these formulations were investigated by differential scanning calorimetry (DSC). Glass transition temperature (T[subscript g]) and thermal coefficient of expansion (TCE) of these cured resins were investigated by thermo-mechanical analyzer (TMA). Storage moduli (E′; E″) and crosslinking density of the cured formulations were measured by dynamic-mechanical analyzer (DMA).Weight loss of these formulations during curing was investigated by thermo-gravimetric analyzer (TGA). Additionally, some comparison results of our successful novel generic underfills with the current commercial experimental no-flow underfills are reported.
  • Item
    Fast-Flow Underfill Encapsulant: Flow Rate and Coefficient of Thermal Expansion
    (Georgia Institute of Technology, 1998-06) Wong, C. P. ; Vincent, Michael Brien ; Shi, Songhua
    In the flip-chip on board assembly method, an underfill encapsulant material is applied in the gap between the integrated circuit (IC) chip and substrate to distribute the shear stresses at the solder interconnects. These shear stresses are imposed on the solder interconnects due to a coefficient of thermal expansion (CTE) mismatch between the IC chip and substrate. Different technologies such as fast-flow, no-flow, and reworkable underfills are currently being studied for flip-chip underfill encapsulant materials. This paper looks at the underfill encapsulant used in the fast-flow method of underfilling the IC chip/substrate gap. The effect of filler loading, particle size, and particle size distribution on the flow rate and CTE of the fastflow underfill material are discussed in this work. The material used for the experiments is an epoxy resin with added silica filler to decrease the CTE. This study focuses on what effect different filler characteristics have on the underfill encapsulant. Also, an underfill encapsulant that can compete with one of industry’s faster fast-flow underfills was developed as a result of this work.