Series
CRNCH Summit
Permanent Link
Series Type
Description
Associated Organization(s)
Publication Search Results
Migratory Memory-Side Processing Breakthrough Architecture for Graph Analytics
Series
CRNCH Summit
Event Series
1 - 1 of 1
Item
Today's data intensive applications, such as sparse-matrix linear algebra and graph analytics, do not exhibit the same locality traits as compute-intensive applications, resulting in the latency of individual memory accesses overwhelming the advantages of deeply pipe-lined fast cores. The Emu Migratory Memory-Side Processing architecture provides a highly efficient, fine-grained memory system and migrating threads that move the thread state as new memory locations are accessed, without explicit program directives. The "put-only" communication model dramatically reduces thread latency and total network bandwidth load as return trips and cache coherency are eliminated. Working with the CRNCH team, Emu shares results that validate the viability of the architecture, presents a roadmap for scalability and discusses how the architecture delivers orders of magnitude reduction in data movement, inter-process communication and energy requirements. The talk touches on the familiar programming
model selected for the architecture which makes it accessible to programmers and data scientists, and reveals upcoming areas of joint research with Georgia Tech in the area of Migratory Threads.