Person:

Fujimoto, Richard M.

Permanent Link

https://hdl.handle.net/1853/71271

Associated Organization(s)

Organizational Unit

School of Computational Science and Engineering

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Now showing 1 - 10 of 12

Source-code Transformations for Efficient Reversibility

(Georgia Institute of Technology, 1999) Perumalla, Kalyan S. ; Fujimoto, Richard M.

An approach based on source-to-source compilation is presented for efficiently realizing reversibility of programs, in the context of the C language. The implementation of this approach in a portable "reverse C compiler" called rcc is described. The compiler takes arbitrary C functions as input, and renders them reversible, and, in addition, automatically generates their reverse functions. The system is sufficiently general to correctly handle complex data types and to handle complex control flow such as recursion and inter-mixing jump instructions. The compiler is designed to be general-purpose, to be used in any application requiring efficient reverse execution capability. A simple macro interface is used to help retarget the compiler to different application domains. As a case study, the application of rcc to optimistic parallel simulation is presented. Optimizations, such as "message-send slicing", are presented that help in reducing the overheads that may be added for achieving reversibility.
Georgia Tech Time Warp (GTW Version 3.1) Programmer's Manual for Distributed Network of Workstations

(Georgia Institute of Technology, 1997) Fujimoto, Richard M. ; Das, Samir Ranjan ; Panesar, Kiran S. ; Hybinette, Maria ; Carothers, Christopher D.

This manual gives an introduction to writing parallel discrete event simulation programs for the Georgia Tech Time Warp (GTW) system (version 3.1). Time Warp is a synchronization mechanism for parallel discrete event simulation programs. GTW is a Time Warp simulation kernel implemented on distributed network of uniprocessor and shared memory multiprocessor machines.
MetaTeD --- A Meta Language for Modeling Telecommunication Networks

(Georgia Institute of Technology, 1996) Perumalla, Kalyan S. ; Fujimoto, Richard M. ; Ogielski, Andrew T.

TeD is a language designed mainly for modeling telecommunication networks. The TeD language specification is separated into two parts -- (1) a "meta" language (2) an "external" language. The meta language specification is concerned with the high-level description of the structural and behavioral interfaces of various network elements. The external language specification is concerned with the detailed low-level description of the implementation of the structure and behavior of the network elements. The meta language, called MetaTeD, is described in this document (An external language specification, with C++ as the external language, is described in a separate related document.).
Distributed Laboratories: A Research Proposal

(Georgia Institute of Technology, 1996) Schwan, Karsten ; Ahamad, Mustaque ; Hudson, Scott E. ; Limb, J. O. (John O.) ; Ammar, Mostafa H. ; Ezquerra, Norberto F. ; Mukherjee, Amarnath ; Potts, Colin ; Ramachandran, Umakishore ; Zegura, Ellen W. ; Fujimoto, Richard M.

The continuing merger of computer and communication technologies is leading to a new computing/communications infrastructure of unprecedented magnitude, enabling new applications with broad economic and social impact. Yet, such applications pose major challenges to researchers in Computer Science and in application domains. The topic of the proposed research program is the realization of Distributed Laboratories, where individuals can interact with each other, and more importantly, with powerful, distributed computational tools as readily as if all were located in a single site. Our intent is to permit scientists, engineers, and managers at geographically distinct locations (including individuals 'tele-commuting' from home) to combine their expertise in solving shared problems, by allowing them to simultaneously view, interact with, and steer sophisticated computations executing on high performance distributed computing platforms.
GTW++ -- An Object-oriented Interface in C++ to the Georgia Tech Time Warp System

(Georgia Institute of Technology, 1996) Perumalla, Kalyan S. ; Fujimoto, Richard M.

This document describes GTW++, an efficient object-oriented interface to the Georgia Tech Time Warp (GTW) parallel simulation system for shared memory multiprocessors. The interface, which is in C++, provides a clean and extensible set of abstractions for model developers wishing to use Time Warp as the parallel simulation paradigm. This interface delivers virtually the same performance as that of the C language interface to GTW. The object-oriented approach facilitates easily building higher-level interfaces, such as process-oriented views, over the basic GTW++ interface. GTW++ has been carefully designed so that almost identical interfaces can be supported for different parallel computing platforms, such as shared-memory machines and network of workstations, with appropriate underlying implementations for each platform. Furthermore, the GTW++ interface can be directly provided by the GTW kernel if and when the kernel itself is redesigned using an object-oriented approach.
A C++ Instance of TeD

(Georgia Institute of Technology, 1996) Perumalla, Kalyan S. ; Fujimoto, Richard M.

TeD is a language designed mainly for modeling telecommunication networks. The TeD language specification is separated into two parts --- (1) a "meta" language (2) an "external" language. The meta language specification is concerned with the high--level description of the structural and behavioral interfaces of various network elements. The external language specification is concerned with the detailed low-level description of the implementation of the structure and behavior of the network elements. The meta language, called MetaTeD, is described in a separate related document. An external language specification, with C++ as the external language, is described in this document. A software support system for the development and parallel simulation of TeD models is also described.
Optimistic Real-Time Simulation

(Georgia Institute of Technology, 1995) Ghosh, Kaushik ; Fujimoto, Richard M. ; Schwan, Karsten

On-line simulations play a critical role in understanding, supervising, and controlling large-scale systems. For instance, in military training applications, users are presented with complex scenarios that consist of both actual and simulated devices interacting in real-time. Troubleshooting of complex telephone networks may utilize on-line simulations to play “what if” games when evaluating alternative solution strategies. Future command and control applications are envisioned to present end users with data originating simultaneously from actual observations and from simulations. The discrete event simulations (DES) employed with such real-world applications are among the most computer-intensive applications known today. Since “traditional” parellelization of DES is of limited utility due to irregular, complex data dependencies, such parallelization commonly employs speculative execution. Unfortunately, it is unclear whether speculatively executed DES can operate correctly in the presence of the real-time constraints imposed by electro-mechanical systems and human participants.This paper describes a prototype real-time simulation system using speculative execution methods on a high performance, parallel machine. In addition, we explain the technical problems that must be addressed for systems that contain both simulated and actual real-time devices, and we describe appropriate solution methods. For illustrative purposes, problems, solutions, and the real-time simulation testbed are exposed using a sample application in which a simulation interacts with real-time software to control a robotic device.
PORTS: Experiences with a Scheduler for Dynamic Real-Time Systems

(Georgia Institute of Technology, 1994) Ghosh, Kaushik ; Fujimoto, Richard M. ; Schwan, Karsten

This paper describes several of our experiences with a real-time scheduler. Using a robot control application program, we motivate the importance of supporting multiple schedulers within the same application program. We demonstrate the utility of speculative task execution in dynamic real-time systems, and describe the implementation of a scheduler for performing speculative execution and recovery. We show that existing real-time scheduler interfaces have scope for improvement, especially when scheduling latency must be low and when multiple schedulers used by a single application must co-exist on a single processor. A new scheduler interface is specified and its basic costs are evaluated experimentally. Preliminary measurements on a KSR-1 machine are quoted. The measurements demonstrate how the execution times of temporal queries may be reduced by use of access structures to scheduler data structures. Finally, there are several overheads associated with speculative execution, and multiple schedulers in a single application. We consider the problem of on-line reconfiguration of the several overheads associated with the speculative-execution paradigm for optimal performance in the face of these overheads. Initial performance measurements of the PORTS scheduler indicate that it is possible to perform real-time scheduling with latencies approximating those of proposed specialized scheduling co-processors.
Parallel Discrete Event Simulation Using Space-Time Memory

(Georgia Institute of Technology, 1994) Ghosh, Kaushik ; Fujimoto, Richard M.

An abstraction called space-time memory is discussed that allows parallel discrete event simulation programs using the Time Warp mechanism to be written using shared memory constructs. A few salient points concerning the implementation and use of space-time memory in parallel simulation are discussed. It is argued that this abstraction is useful from a programming standpoint for certain applications, and can yield good performance. Initial performance measurements of a prototype implementation of the abstraction on a shared-memory multiprocessor are described, and compared with a conventional, message-based implementation of Time Warp.
Timepatch: A Novel Technique for the Parallel Simulation of Multiprocessor Caches

(Georgia Institute of Technology, 1994) Shah, Gautam H. ; Ramachandran, Umakishore ; Fujimoto, Richard M.

We present a new technique for the parallel simulation of cache coherent shared memory multiprocessors. Our technique is based on the fact that the functional correctness of the simulation can be decoupled from its timing correctness. Thus in our simulations we can exploit as much parallelism as is available in the application without being constrained by conservative scheduling mechanisms that might limit the available parallelism in order to guarantee the timing correctness of the simulation. Further, application specific details (which can be gleaned from the compiler) such as data layout in the caches of the target architecture can be exploited to reduce the overhead of the simulation. The simulation correctness is guaranteed by patching the performance related timing information at specific points in the program (commensurate with the programming model). There are two principal advantages to this technique: being able to simulate larger parallel systems (both problem size and number of processors) than is feasible to simulate sequentially; and being able to speed up the simulation compared to a sequential simulator. For proof of concept, we have implemented this technique for an execution-driven parallel simulator on the KSR-2, a cache-coherent shared memory machine, for a target architecture that uses an invalidation-based protocol. We validate the performance statistics gathered from this simulator (using traces) by comparing it against a sequential simulator. We show that the method is both viable and promises to offer significant speedups with the number of processors. We provide a detailed performance study of our technique using some benchmark application programs.