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ItemMaterials, design and processing of air encapsulated MEMS packaging(Georgia Institute of Technology, 2011-12-16) Fritz, Nathan TylerAir-gap structures are of particular interest for packaging of microelectromechanical systems (MEMS). In this work, an overcoat material is used to cover a sacrificial polymer, which protects the MEMS device during packaging. Once the overcoat is in place, the sacrificial polymer is thermally decomposed freeing the MEMS structure while the overcoat dielectric provides mechanical protection from the environment. An epoxy POSS dielectric was used as a high-selectivity etch mask for the PPC and a rigid overcoat for the structure leading to the process improvements. The packaging structures can be designed for a range of MEMS device sizes and operating environments. However, the air-cavity structures need additional rigidity to withstand chip-level packaging conditions. Metalized air cavity packages were molded under traditional lead frame molding pressures and tested for mechanical integrity. The experimental molding tests and mechanical models were used to establish processing conditions and physical designs for the cavities as a function of cavity size. A semi-hermetic package was created using an in-situ sacrificial decomposition/epoxy cure molding step for creating large cavity chip packages. Through the optimization of the air cavity, new materials and processes were tested for general microfabrication. The epoxy POSS dielectric provides a resilient, strong inorganic/organic hybrid dielectric for use in microfabrication and packaging applications. Polycarbonates can be used for low cost temporary adhesives in wafer-wafer bonding. An improved electroless deposition process for silver and copper was developed. The Sn/Pd activation was replaced by a cost efficient Sn/Ag catalyst. The process was shown to be able to deposit adherent copper on smooth POSS and silicon dioxide surfaces. Electroless copper was demonstrated on untreated silicon oxide wafers for TSV sidewall deposition.
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ItemImprint lithography and characterization of photosensitive polymers for advanced microelectronics packaging(Georgia Institute of Technology, 2010-06-23) Rajarathinam, VenmathyTo enable fast and reliable processors, advances must be made in the interconnections on the printed circuit board and in the interconnections from the chip to the printed circuit board. Processing techniques have been demonstrated to fabricate a copper-clad encapsulated air dielectric layer to enable low loss off-chip electrical signal lines using sacrificial polymers and the three dimensional patterning capabilities of imprint lithography. The inclusion of an air gap can eliminate the dielectric loss allowing the signal to propagate over longer lengths. Additionally, the low dielectric constant of air lowers the loss contributions from the conductor and increases the signal propagation velocity reducing delay. The metal shielding could minimize the crosstalk noise and radiation losses that are significant at high frequencies. The three dimensional patterning capabilities of imprint lithography fabricated curved structures and rounded terminations which can reduce reflections at discontinuities. Furthermore, imprint lithography also created planarized surfaces which simplified the buildup process. Since imprint lithography, only uses temperature and pressure to make a pattern it is an inexpensive and simple process advancement. The metal-clad encapsulated air dielectric structures were fabricated in a comparable number of registration steps to traditional transmission lines. Implementation of all copper chip to substrate interconnects would provide high conductivity electrical connections, resistance to electromigration while avoiding formation of brittle intermetallics. High aspect ratio polymer molds for copper electroplating interconnects could enable improved integrated circuit electrical performance. The properties of a new aqueous base develop, negative-tone photosensitive polynorbornene polymer have been characterized to develop mechanically compliant all copper connections between the chip and printed circuit board. High aspect ratio features of 7:1 (height:width) were produced in 70 ìm thick films in a single coat with straight side-wall profiles and high fidelity. The polymer films studied had a contrast of 11.6 and a low absorption coefficient. To evaluate the polymer's suitability to microelectronics applications, epoxy cross-linking reactions were studied as a function of processing condition through Fourier transform infrared spectroscopy, nano-indentation, and dielectric measurements. The fully cross-linked films had an elastic modulus of 2.9 GPa and hardness of 0.18 GPa which can improve the mechanical compliance of the copper interconnections. A photo-imprint lithography process was developed to improve the photo-patterning of the polynorbornene polymer for high aspect ratio hollow structures. A shallow photo-imprint stamp was developed to physically displace material in the polymer core. Since the imprint stamp displaces material in the area of the feature, the effective film thickness is reduced compared to the bulk film. The reduction in film height reduced the effects of scattering in the core and also facilitated transport of developer within the core. The photo-imprint lithography process resulted in high aspect ratio hollow core pillars that exceeded optical resolution capabilities for comparable feature sizes.
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ItemEnhanced Adhesion Between Electroless Copper and Advanced Substrates(Georgia Institute of Technology, 2008-04-11) Hayden, Harley T.In this work, adhesion between electrolessly deposited copper and dielectric materials for use in microelectronic devices is investigated. The microelectronics industry requires continuous advances due to ever-evolving technology and the corresponding need for higher density substrates with smaller features. At the same time, adhesion must be maintained in order to preserve package reliability and mechanical performance. In order to meet these requirements two approaches were taken: smoothing the surface of traditional epoxy dielectric materials while maintaining adhesion, and increasing adhesion on advanced dielectric materials through chemical bonding and mechanical anchoring. It was found that NH3 plasma treatments can be effective for increasing both catalyst adsorption and adhesion across a range of materials. This adhesion is achieved through increased nitrogen content on the polymer surface, specifically N=C. This nitrogen interacts with the palladium catalyst particles to form chemical anchors between the polymer surface and the electroless copper layer without the need for roughness. Chemical bonding alone, however, did not enable sufficient adhesion but needed to be supplemented with mechanical anchoring. Traditional epoxy materials were treated with a swell and etch process to roughen the surface and create mechanical anchoring. This same process was found to be ineffective when used on advanced dielectric materials. In order to create controlled roughness on these surfaces a novel method was developed that utilized blends of traditional epoxy with the advanced materials. Finally, combined treatments of surface roughening followed by plasma treatments were utilized to create optimum interfaces between traditional or advanced dielectric materials and electroless copper. In these systems adhesion was measured over 0.5 N/mm with root-mean-square surface roughness as low as 15 nm. In addition, the individual contributions of chemical bonding and mechanical anchoring were identified. The plasma treatment conditions used in these experiments contributed up to 0.25 N/mm to adhesion through purely chemical bonding with minimal roughness generation. Mechanical anchoring accounted for the remainder of adhesion, 0.2-0.8 N/mm depending on the level of roughness created on the surface. Thus, optimized surfaces with very low surface roughness and adequate adhesion were achieved by sequential combination of roughness formation and chemical modifications.
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ItemMaterials, Processes, and Characterization of Extended Air-gaps for the Intra-level Interconnection of Integrated Circuits(Georgia Institute of Technology, 2008-01-02) Park, SeonghoMaterials, Processes, and Characterization of Extended Air-gaps for the Intra-level Interconnection of Integrated Circuits Seongho Park 157 pages Directed by Dr. Paul A. Kohl and Dr. Sue Ann Bidstrup Allen The integration of an air-gap as an ultra low dielectric constant material in an intra-metal dielectric region of interconnect structure in integrated circuits was investigated in terms of material properties of a thermally decomposable sacrificial polymer, fabrication processes and electrical performance. Extension of the air-gap into the inter-layer dielectric region reduces the interconnect capacitance. In order to enhance the hardness of a polymer for the better process reliabilities, a conventional norbornene-based sacrificial polymer was electron-beam irradiated. Although the hardness of the polymer increased, the thermal properties degraded. A new high modulus tetracyclododecene-based sacrificial polymer was characterized and compared to the norbornene-based polymer in terms of hardness, process reliability and thermal properties. The tetracyclododecene-based polymer was harder and showed better process reliability than the norbornene-based sacrificial polymer. Using the tetracyclododecene-based sacrificial polymer, a single layer Cu/air-gap and extended Cu/air-gap structures were fabricated. The effective dielectric constant of the air-gap and extended air-gap structures were 2.42 and 2.17, respectively. This meets the requirements for the 32 nm node. Moisture uptake of the extended Cu/air-gap structure increased the effective dielectric constant. The exposure of the structure to hexamethyldisilazane vapor removed the absorbed moisture and changed the structure hydrophobic, improving the integration reliability. The integration processes of the air-gap and the extended air-gap into a dual damascene Cu metallization process has been proposed compared to state-of-the-art integration approaches.
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ItemThe Fabrication of Direct-Write Waveguides via the Glassy-State Processing of Porous Films: UV-Induced Porosity and Solvent-Induced Porosity(Georgia Institute of Technology, 2007-05-03) Abdallah, JassemThe incorporation of porosity in a material potentially results in the changes in electrical, mechanical and electrical properties and has generated much interest by researchers. The development of new techniques for inducing porosity in thin films may prove advantageous if they lead to a decrease in processing complexity, or an increase in the processing flexibility by widening the window of compatible physical conditions, or the improvement of the final properties of the porous materials. Two processing techniques were developed to produce porosity in thin dielectric films at temperatures below the glass transition temperature of the host matrix. These glassy-regime processing methods relied on the susceptibility of hydrogen silsesquioxane (HSQ) to gelation in the glassy regime when exposed to polar substances. Both of these glassy-regime processing methods relied on the susceptibility of hydrogen silsesquioxane (HSQ) towards gelation in the glassy regime when exposed to polar substances. The first processing method made use of co-solvent mixtures of polar non-protic organic solvent to serve both as gelation catalysts and pore-generators. HSQ films were soaked in the polar organic co-solvents, which penetrated the films and initiated crosslinking throughout the matrix. Afterwards the films were baked, volatilizing entrapped solvents and producing air pockets within the rigid matrix. The second porosity method used UV-radiation to initiate acid-catalyzed decomposition of polycarbonate sacrificial polymers after first using bases to catalyze the gelation of HSQ. The radiation-based (direct-write) decomposition of the porogen enabled the selective patterning of regions porosity via the use of a photomask, which resulted in the creation of refractive index profiles in the direct-written films. Porous films that were produced by these two glassy-state processing techniques were used to build slab waveguide structures. Optical characterization experiments showed that the fabricated waveguides had average propagation losses of 16 - 27 dB/cm for the first guided TE mode and about 36-40 dB/cm, for the second TE guided mode. It is believed that the large propagation loss values were caused by a combination of the Rayleigh scattering from the relatively large UV-induced pores produced in the direct-write layers as well as scattering induced by surface roughness.
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ItemFabrication of High Performance Chip-to-Substrate Interconnections(Georgia Institute of Technology, 2007-04-06) He, AteNovel fabrication technologies for high performance electrical and optical chip-to-substrate input/output (I/O) interconnections were developed. This research is driven by the long term performance and integration requirements of high performance chip-to-substrate I/Os, as well as the package reliability demands from semiconductor manufacturing. An electroless copper plating and annealing process was developed to join copper structures to achieve chip-to-substrate assembly by all copper pillar interconnects. The developed copper pillar interconnects provide much higher current carrying capability for chip-to-substrate power/ground input/output distributions and have low electrical parasitic characteristics for high frequency electrical signal communications. This copper bonding process also demonstrates the capability to compensate for misalignments and height variations of bonded structures. A finite element generalized plane deformation model was employed to design fully compliant copper pillars to eliminate the need of underfill. Electrical parasitics of copper pillar chip-to-substrate interconnects were studied by the derived formulas for low parasitic requirements. An optimized dimension space for all the criteria was provided on the pillar dimension chart. A novel nanoimprint lithography was developed to combine with photolithography in one process to create high quality features on a macrostructure for chip-to-substrate optical I/O applications. This fabrication process also demonstrated the capability to produce off-angle complex structures.
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ItemAir-Gaps via Thermally Decomposable Polymers and Their Application to Compliant Wafer Level Packaging (CWLP)(Georgia Institute of Technology, 2005-01-27) Kelleher, Hollie AnneA method was proposed for the fabrication of air-gaps embedded in dielectric layers using thermally decomposable sacrificial polymers. The research had two main objectives: (1) the development and characterization of air-gap fabrication for use in a wide spectrum of applications; and (2) the integration of air-gaps into a specific application: air-gaps in an integrated circuit compliant wafer level packaging technology, Sea of Leads. Polynorbornene and polycarbonate sacrificial materials were used to form air-gaps at temperatures of 200, 300, and 400oC. Fabrication results of air-gaps encapsulated by both inorganic and organic dielectric materials indicated that the thermal and mechanical properties of the dielectric materials at the decomposition temperature of the sacrificial material resulted in success or failure of the process. Multi-layered encapsulating materials enabled the use of a dielectric material which does not successfully form air-gaps on its own. Thermal decomposition of the sacrificial materials with alteration in the polymer chemistry was studied. Polynorbornene containing 90 mol% butyl and 10 mol% triethoxysilyl side groups was selected as an optimum 400oC decomposition temperature material. The decomposition of this polynobornene composition in an open nitrogen atmosphere was contrasted to decomposition of the polynorbornene while completely encapsulated in a dielectric material. Thermogravimetric analysis and examination of residual surfaces following the decomposition, combined with comparison of the overall kinetic parameters of the decomposition reaction, indicated differences in the two overall processes. The design concept of Sea of Leads three-dimensionally compliant packaging technology with embedded air-gaps is presented. The critical issues resulting from the addition of air-gaps into the process are the compatibility of materials, lithography on topographical features, and yield and uniformity. Factors influencing the z-axis mechanical performance of the air-gap were determined to be the air-gap shape and size, the encapsulating material dielectric properties and thickness, and the decomposition conditions. Model calculations combined with the known limitations of fabrication provided a design space for maximum out-of-plane mechanical movement and compliance of the air-gaps. The results demonstrated that the incorporation of an embedded air-gap in Sea of Leads technology can achieve the necessary z-axis compliance goals for future applications.