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School of Materials Science and Engineering

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Now showing 1 - 2 of 2
  • Item
    Investigation of processing condition on the reliability and performance of future memory devices
    (Georgia Institute of Technology, 2022-06-02) Hah, Jinho
    About a quarter of the total semiconductor market is comprised of memory technologies. However, due to the limits in scalability related to Moore’s Law, the need for additional memory capacity and bandwidth is increasing. Currently, dynamic random-access memory (DRAM) is in high-volume but is reaching its scaling limit. To overcome the DRAM scaling limit with higher bandwidth, lower power, and smaller surface area, through-silicon-via (TSV) stacking method via thermo-compression bonding (TCB) technology has been widely employed due to the placement accuracy for 3D packaging technology and manufacturing 3D high bandwidth memory (HBM) DRAM modules. In addition to utilizing TCB technology to DRAM modules, memristors as an emerging memory is another memory class that can help overcome the scaling limit and holds a huge promise to overcome the current bottlenecks. Two project areas will be discussed. In the first project, comprehensive and comparative analysis between the TCB-processed and reflow-processed solder joint reliability performance is investigated. This study investigates the failure analysis of the solder joints via detailed solder joint and solder joint/bond pad interface characterization to understand the reliability issues of the emerging TCB-processed packages. In the second project, memristor, a class of resistive random-access memory (RRAM) will be explored. The RRAM or memristor is an emerging memory that shows promise to overcome the current obstacles in conventional memory systems based on a von-Neumann architecture. So far, the difficulty in achieving multiple resistance states and obtaining resistance linearity remain as the challenges towards commercialization and for in-memory computing and synaptic device (i.e., neuromorphic) applications. In this work, the effect of the chemical environment of the HfOx/Ti interface and the processing condition during analog operation on the memristor performance are explored. The presence of excess oxygen concentration at the interface and fundamental understanding of the local thermal and chemical environment at the memristor filament region during analog RESET operation are investigated to better understand the memristors’ resistive switching mechanisms.
  • Item
    Encapsulation and design of scalable packaging materials for thin film perovskite solar cell applications
    (Georgia Institute of Technology, 2019-04-25) Hah, Jinho
    There have been many attempts to improve the stability of the environmentally-sensitive perovskite solar cells (PSCs) from adverse environments. The next generation encapsulation method should be compatible with roll-to-roll (R2R) processing, which can manufacture thin-film PSC modules at large scale and make solar electricity economically competitive with conventional electricity generation. This work investigates the interface chemistry between the polymer backsheet and the polymer encapsulants to understand the moisture, thermal, and UV stability of the packaging materials for PSCs. First, surface modification on the commercially available PET backsheets was done using various types of silane-based coupling agents, and their adhesion profiles were studied upon damp-heat exposure on these samples. Second, thorough XPS analysis was conducted on the delaminated PET surface from the PET/EVA/PET encapsulation architecture upon the UV, thermal, and moisture aging to understand the degradation mechanism at the interface. Moreover, this work also includes encapsulant design by combining the polymer blends to improve the mechanical and chemical bulk properties of a PV encapsulant. In short, this work serves to investigate on the encapsulation methods to improve the reliability and lifetime of PSCs.