System Scaling Through Heterogeneous Integration

Swaminathan, Madhavan

Title:

System Scaling Through Heterogeneous Integration

dc.contributor.author	Swaminathan, Madhavan
dc.contributor.corporatename	Georgia Institute of Technology. Institute for Electronics and Nanotechnology	en_US
dc.contributor.corporatename	Georgia Institute of Technology. School of Electrical and Computer Engineering	en_US
dc.contributor.corporatename	Georgia Institute of Technology. School of Materials Science and Engineering	en_US
dc.contributor.corporatename	Georgia Institute of Technology. 3D Systems Packaging Research Center	en_US
dc.date.accessioned	2019-09-06T17:58:12Z
dc.date.available	2019-09-06T17:58:12Z
dc.date.issued	2019-08-27
dc.description	Presented on August 27, 2019 at 12:00 p.m.-1:00 p.m. in the Marcus Nanotechnology Building, Room 1117-1118, Georgia Tech.	en_US
dc.description	Madhavan Swaminathan is the John Pippin Chair in Microsystems Packaging & Electromagnetics in the School of Electrical and Computer Engineering (ECE) with a joint appointment in the School of Materials Science and Engineering (MSE), and was recently appointed Director of the 3D Systems Packaging Research Center (PRC), GT. He also serves as the Site Director for the NSF Center for Advanced Electronics through Machine Learning (CAEML). He formerly held the position of Founding Director, Center for Co-Design of Chip, Package, System (C3PS), Joseph M. Pettit Professor in Electronics in ECE and Deputy Director of the Packaging Research Center (NSF ERC), GT. Prior to joining GT, he was with IBM working on packaging for supercomputers. He is the author of 500+ refereed technical publications, holds 30 patents, primary author and co-editor of 3 books, founder and co-founder of two start-up companies, and founder of the IEEE Conference Electrical Design of Advanced Packaging and Systems (EDAPS), a premier conference sponsored by the EPS society. He is an IEEE Fellow and has served as the Distinguished Lecturer for the IEEE EMC society. He received his MS/PhD degrees in Electrical Engineering from Syracuse University in 1989 and 1991, respectively.	en_US
dc.description	Runtime: 56:50 minutes	en_US
dc.description.abstract	A combination of "Moore" (IC) and "More than Moore" (package) scaling has led to the shrinking of electronic systems over the last several decades. As scaling continues beyond CMOS to include advanced devices, scaling of the package needs to continue to enable system scaling, leading to the integration and miniaturization of systems. This requires new technologies for package integration which when connected to assembled ICs leads to System on Package (SoP) solutions that have superior performance and size as compared to current technologies. This presentation will discuss advanced SoP platforms for integration with a focus on heterogeneity for a variety of applications that include AI, HPC, Power Electronics, mmWave to name a few. The inter-disciplinary nature of the research will be highlighted based on faculty interactions between four different schools at GT.	en_US
dc.format.extent	56:50 minutes
dc.identifier.uri	http://hdl.handle.net/1853/61828
dc.language.iso	en_US	en_US
dc.publisher	Georgia Institute of Technology	en_US
dc.relation.ispartofseries	Nano@Tech Lecture Series
dc.subject	Heterogeneous integration	en_US
dc.subject	Nanotechnology	en_US
dc.subject	Packaging	en_US
dc.subject	System integration	en_US
dc.title	System Scaling Through Heterogeneous Integration	en_US
dc.type	Moving Image
dc.type.genre	Lecture
dspace.entity.type	Publication
local.contributor.author	Swaminathan, Madhavan
local.contributor.corporatename	Institute for Electronics and Nanotechnology (IEN)
local.relation.ispartofseries	Nano@Tech Lecture Series
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