Exploring Reconfigurable Analog Hopfield and Ising Networks on the SoC FPAA
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Mathews, Pranav Oommen
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Abstract
Energy minimization techniques can give good or optimal solutions to otherwise computationally intractable problems. Hopfield and Ising networks are two structures that minimize energy surfaces through dynamics, solving problems that correspond to those surfaces. Analog circuits efficiently implement complicated dynamics, allowing for low power and high speed networks to be designed. This work shows an analog Hopfield network built and tested on a reconfigurable, programmable chip: the SoC FPAA. The designed Hopfield network efficiently solved three NP-hard problems (max-cut, 3SAT, and TSP), converging to optimal or good solutions in microseconds. An Ising network is also built on the same FPAA and compared to the Hopfield network on solving small max-cut and associative memory problems. The analog Hopfield network is shown to outperform the Ising network, suggesting that Hopfield networks may be the more suitable energy minimization structure for an analog CMOS implementation.
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2023-07-25
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