Title:
Numerical transformations for area, power, and testability optimization in the synthesis of digtal signal processing ASICs
Numerical transformations for area, power, and testability optimization in the synthesis of digtal signal processing ASICs
dc.contributor.advisor | Chatterjee, Abhijit | |
dc.contributor.author | Nguyen, Huy Tam | en_US |
dc.contributor.department | Electrical and Computer Engineering | en_US |
dc.contributor.department | Electric Engineering | en_US |
dc.date.accessioned | 2007-03-01T18:52:03Z | |
dc.date.available | 2007-03-01T18:52:03Z | |
dc.date.issued | 1998-05 | en_US |
dc.description.degree | Ph.D. | |
dc.format.extent | 237 bytes | |
dc.format.mimetype | text/html | |
dc.identifier.bibid | 467249 | en_US |
dc.identifier.uri | http://hdl.handle.net/1853/13548 | |
dc.language.iso | en_US | |
dc.publisher | Georgia Institute of Technology | en_US |
dc.rights | Access restricted to authorized Georgia Tech users only. | en_US |
dc.subject.lcsh | Application specific integrated circuits Design and construction | en_US |
dc.subject.lcsh | Signal processing Digital techniques | en_US |
dc.subject.lcsh | Mathematical optimization | en_US |
dc.title | Numerical transformations for area, power, and testability optimization in the synthesis of digtal signal processing ASICs | en_US |
dc.type | Text | |
dc.type.genre | Dissertation | |
dspace.entity.type | Publication | |
local.contributor.advisor | Chatterjee, Abhijit | |
local.contributor.corporatename | School of Electrical and Computer Engineering | |
local.contributor.corporatename | College of Engineering | |
relation.isAdvisorOfPublication | 01f2340e-40b6-449d-8f8a-80b6599c8ffb | |
relation.isOrgUnitOfPublication | 5b7adef2-447c-4270-b9fc-846bd76f80f2 | |
relation.isOrgUnitOfPublication | 7c022d60-21d5-497c-b552-95e489a06569 |
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