Title:
Section topographic characterization of strains accompanying dicing of silicon

dc.contributor.author Stock, Stuart R. en_US
dc.contributor.corporatename Georgia Institute of Technology. School of Materials Science and Engineering en_US
dc.contributor.corporatename Georgia Institute of Technology. Office of Sponsored Programs
dc.contributor.corporatename Georgia Institute of Technology. Office of Sponsored Programs
dc.date.accessioned 2006-05-11T15:25:49Z
dc.date.available 2006-05-11T15:25:49Z
dc.date.issued 1998 en_US
dc.description Issued as final report en_US
dc.format.extent 8428255 bytes
dc.format.mimetype application/pdf
dc.identifier.uri http://hdl.handle.net/1853/9602
dc.language.iso en_US
dc.publisher Georgia Institute of Technology en_US
dc.relation.ispartofseries School of Materials Science and Engineering ; Project no. E-18-T09 en_US
dc.subject Silicon en_US
dc.subject Integrated circuits Wafer-scale integration en_US
dc.title Section topographic characterization of strains accompanying dicing of silicon en_US
dc.type Text
dc.type.genre Technical Report
dspace.entity.type Publication
local.contributor.corporatename School of Materials Science and Engineering
relation.isOrgUnitOfPublication 21b5a45b-0b8a-4b69-a36b-6556f8426a35
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