Title:
Post-CMOS memory technologies and their applications in emerging computing models
Post-CMOS memory technologies and their applications in emerging computing models
dc.contributor.advisor | Raychowdhury, Arijit | |
dc.contributor.author | Yoon, Insik | |
dc.contributor.committeeMember | Khan, Asif Islam | |
dc.contributor.committeeMember | Yu, Shimeng | |
dc.contributor.committeeMember | Rakshit, Titash | |
dc.contributor.committeeMember | Datta, Suman | |
dc.contributor.department | Electrical and Computer Engineering | |
dc.date.accessioned | 2019-08-21T13:54:30Z | |
dc.date.available | 2019-08-21T13:54:30Z | |
dc.date.created | 2019-08 | |
dc.date.issued | 2019-07-10 | |
dc.date.submitted | August 2019 | |
dc.date.updated | 2019-08-21T13:54:30Z | |
dc.description.abstract | The objective of this proposed research is to take a holistic approach to the post-CMOS in/near-memory processing system design for machine learning and optimizations. We first address the current issues of Spin-Transfer Torque Magnetic Random Access Memory(STT-MRAM) and multi-bit ferroelectric FET in the device level. At the circuit level, the research shows how these issues shape the peripheral circuit of STT-MRAM and ferroelectric FET memory arrays. Lastly, at the system level, the research leads to the efficient memory architecture and system design that maximizes the benefits of STT-MRAM and ferroelectric FET while mitigating the current limitations of these devices. In the proposed research, we apply the in/near memory processing system design with STT-MRAM and ferroelectric FETs to various applications such as reinforcement learning with a drone, image classification with Deep Neural Network and least square minimization for image reconstruction. For the remaining part of this research, we will focus on near-memory processing system with STT-MRAM for reinforcement learning of a drone and evaluate the system to quantify how much benefits are expected in terms of latency, power and energy.From this project, we would like to show that near-memory processing system with nonvolatile devices is a key enabler for real-time learning systems with stringent power and energy constraints. | |
dc.description.degree | Ph.D. | |
dc.format.mimetype | application/pdf | |
dc.identifier.uri | http://hdl.handle.net/1853/61768 | |
dc.language.iso | en_US | |
dc.publisher | Georgia Institute of Technology | |
dc.subject | Post-CMOS memory | |
dc.subject | STT-MRAM | |
dc.subject | Ferroelectric FET | |
dc.subject | Reinforcement learning | |
dc.subject | In-memory computing | |
dc.subject | Convex optimization | |
dc.title | Post-CMOS memory technologies and their applications in emerging computing models | |
dc.type | Text | |
dc.type.genre | Dissertation | |
dspace.entity.type | Publication | |
local.contributor.advisor | Raychowdhury, Arijit | |
local.contributor.corporatename | School of Electrical and Computer Engineering | |
local.contributor.corporatename | College of Engineering | |
relation.isAdvisorOfPublication | c44dbd39-c229-4ffb-9bc0-007eb0904114 | |
relation.isOrgUnitOfPublication | 5b7adef2-447c-4270-b9fc-846bd76f80f2 | |
relation.isOrgUnitOfPublication | 7c022d60-21d5-497c-b552-95e489a06569 | |
thesis.degree.level | Doctoral |