Title:
A coordinated approach to reconfigurable analog signal processing

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dc.contributor.advisor Hasler, Jennifer
dc.contributor.author Schlottmann, Craig Richard
dc.contributor.committeeMember Anderson, David
dc.contributor.committeeMember Lanterman, Aaron
dc.contributor.committeeMember McClellan, James
dc.contributor.committeeMember Smith, Mark
dc.contributor.department Electrical and Computer Engineering
dc.date.accessioned 2013-09-20T12:00:15Z
dc.date.available 2013-09-20T12:00:15Z
dc.date.issued 2012-07-03
dc.description.abstract The purpose of this research is to create a solid framework for embedded system design with field-programmable analog arrays (FPAAs). To achieve this goal, we've created a unified approach to the three phases of FPAA system design: (1) the hardware architecture; (2) the circuit design and modeling; and (3) the high-level software tools. First, we describe innovations to the reconfigurable analog hardware that enable advanced signal processing and integration into embedded systems. We introduce the multiple-input translinear element (MITE) FPAA and the dynamically-reconfigurable RASP 2.9v FPAA, which was designed explicitly for interfacing with external digital systems. This compatibility creates a streamlined workflow for dropping the FPAA hardware into mixed-signal embedded systems. The second phase, algorithm analysis and modeling, is important to create a useful and reliable library of components for the system designer. We discuss the concept and procedure of analog abstraction that empowers non-circuit design engineers to take full advantage of analog techniques. We use the analog vector-matrix multiplier as an example for a detailed discussion on computational analog analysis and system mapping to the FPAA. Lastly, we describe high-level software tools, which are an absolute necessity for the design of large systems due to the size and complexity of modern FPAAs. We describe the Sim2Spice tool, which allows system designers to develop signal processing systems in the Simulink environment. The tool then compiles the system to the FPAA hardware. By coordinating the development of these three phases, we've created a solid unified framework that empowers engineers to utilize FPAAs.
dc.description.degree Ph.D.
dc.identifier.uri http://hdl.handle.net/1853/49021
dc.language.iso en_US
dc.publisher Georgia Institute of Technology
dc.subject System on chip
dc.subject Field programmable analog array
dc.subject Low-power design
dc.subject Analog synthesis
dc.subject Macromodeling
dc.subject Mixed-mode processing
dc.subject.lcsh Signal processing
dc.title A coordinated approach to reconfigurable analog signal processing
dc.type Text
dc.type.genre Dissertation
dspace.entity.type Publication
local.contributor.advisor Hasler, Jennifer
local.contributor.corporatename School of Electrical and Computer Engineering
local.contributor.corporatename College of Engineering
relation.isAdvisorOfPublication da2ccc86-1c57-49e7-b766-ceb2f9a4eac5
relation.isOrgUnitOfPublication 5b7adef2-447c-4270-b9fc-846bd76f80f2
relation.isOrgUnitOfPublication 7c022d60-21d5-497c-b552-95e489a06569
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