Title:
Mono-layer C-face epitaxial graphene for high frequency electronics
Mono-layer C-face epitaxial graphene for high frequency electronics
dc.contributor.advisor | de Heer, Walter A. | |
dc.contributor.author | Guo, Zelei | |
dc.contributor.committeeMember | Jiang, Zhigang | |
dc.contributor.committeeMember | Conrad, Edward H. | |
dc.contributor.committeeMember | First, Phillip N. | |
dc.contributor.committeeMember | Cressler, John D. | |
dc.contributor.department | Physics | |
dc.date.accessioned | 2014-08-27T13:38:24Z | |
dc.date.available | 2014-08-27T13:38:24Z | |
dc.date.created | 2014-08 | |
dc.date.issued | 2014-06-04 | |
dc.date.submitted | August 2014 | |
dc.date.updated | 2014-08-27T13:38:24Z | |
dc.description.abstract | As the thinnest material ever with high carrier mobility and saturation velocity, graphene is considered as a candidate for future high speed electronics. After pioneering research on graphene-based electronics at Georgia Tech, epitaxial graphene on SiC, along with other synthesized graphene, has been extensively investigated for possible applications in high frequency analog circuits. With a combined effort from academic and industrial research institutions, the best cut-off frequency of graphene radio-frequency (RF) transistors is already comparable to the best result of III-V material-based devices. However, the power gain performance of graphene transistors remained low, and the absence of a band gap inhibits the possibility of graphene in digital electronics. Aiming at solving these problems, this thesis will demonstrate the effort toward better high frequency power gain performance based on mono-layer epitaxial graphene on C-face SiC. Besides, a graphene/Si integration scheme will be proposed that utilizes the high speed potential of graphene electronics and logic functionality and maturity of Si-CMOS platform at the same time. | |
dc.description.degree | Ph.D. | |
dc.format.mimetype | application/pdf | |
dc.identifier.uri | http://hdl.handle.net/1853/52268 | |
dc.language.iso | en_US | |
dc.publisher | Georgia Institute of Technology | |
dc.subject | SiC | |
dc.subject | RF | |
dc.subject | SOI | |
dc.subject | Epitaxial graphene | |
dc.subject | High frequency | |
dc.subject | Maximum oscillation frequency | |
dc.subject | Dielectric | |
dc.subject | Top gate | |
dc.subject | Transistor | |
dc.subject | Wafer bonding | |
dc.subject | Smart-cut | |
dc.subject | Nanoribbon | |
dc.title | Mono-layer C-face epitaxial graphene for high frequency electronics | |
dc.type | Text | |
dc.type.genre | Dissertation | |
dspace.entity.type | Publication | |
local.contributor.advisor | de Heer, Walter A. | |
local.contributor.corporatename | College of Sciences | |
local.contributor.corporatename | School of Physics | |
relation.isAdvisorOfPublication | 8ab28407-deb7-4b22-bb02-63fe30f19375 | |
relation.isOrgUnitOfPublication | 85042be6-2d68-4e07-b384-e1f908fae48a | |
relation.isOrgUnitOfPublication | 2ba39017-11f1-40f4-9bc5-66f17b8f1539 | |
thesis.degree.level | Doctoral |
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