Title:
A Cache-Aware Parallel Implementation of the Push-Relabel Network Flow Algorithm and Experimental Evaluation of the Gap Relabeling Heuristic
A Cache-Aware Parallel Implementation of the Push-Relabel Network Flow Algorithm and Experimental Evaluation of the Gap Relabeling Heuristic
| dc.contributor.author | Bader, David A. | |
| dc.contributor.author | Sachdeva, Vipin | |
| dc.date.accessioned | 2007-05-15T21:03:44Z | |
| dc.date.available | 2007-05-15T21:03:44Z | |
| dc.date.issued | 2006-02-25 | |
| dc.description.abstract | The maximum flow problem is a combinatorial problem of significant importance in a wide variety of research and commercial applications. It has been extensively studied and implemented over the past 40 years. The push-relabel method has been shown to be superior to other methods, both in theoretical bounds and in experimental implementations. Our study discusses the implementation of the push-relabel network flow algorithm on present-day symmetric multiprocessors (SMP's) with large shared memories. The maximum flow problem is an irregular graph problem and requires frequent fine-grained locking of edges and vertices. Over a decade ago, Anderson and Setubal implemented Goldberg's push-relabel algorithm for shared memory parallel computers; however, modern systems differ significantly from those targeted by their implementation in that SMP's today have deep memory hierarchies and different performance costs for synchronization and fine-grained locking. Besides our new cache-aware implementation of Goldberg's parallel algorithm for modern shared-memory parallel computers, our main new contribution is the first parallel implementation and analysis of the gap relabeling heuristic that runs from 2.1 to 4.3 times faster for sparse graphs. | en |
| dc.description.sponsorship | This work was supported in part by NSF Grants CAREER ACI-00-93039, NSF DBI-0420513, ITR ACI-00- 81404, DEB-99-10123, ITR EIA-01-21377, Biocomplexity DEB-01-20709, and ITR EF/BIO 03-31654; and DARPA Contract NBCH30390004. | en |
| dc.identifier.uri | http://hdl.handle.net/1853/14384 | |
| dc.language.iso | en_US | en |
| dc.publisher | Georgia Institute of Technology | en |
| dc.relation.ispartofseries | CSE Technical Reports; GT-CSE-06-05 | en |
| dc.subject | Fine-grained locking | en |
| dc.subject | Gap relabeling heuristic | en |
| dc.subject | Parallel algorithms | en |
| dc.subject | Push-relabel algorithm | en |
| dc.subject | Symmetric multiprocessors (SMPs) | en |
| dc.title | A Cache-Aware Parallel Implementation of the Push-Relabel Network Flow Algorithm and Experimental Evaluation of the Gap Relabeling Heuristic | en |
| dc.type | Text | |
| dc.type.genre | Technical Report | |
| dspace.entity.type | Publication | |
| local.contributor.corporatename | College of Computing | |
| local.contributor.corporatename | School of Computational Science and Engineering | |
| local.relation.ispartofseries | College of Computing Technical Report Series | |
| local.relation.ispartofseries | School of Computational Science and Engineering Technical Report Series | |
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| relation.isOrgUnitOfPublication | 01ab2ef1-c6da-49c9-be98-fbd1d840d2b1 | |
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| relation.isSeriesOfPublication | 5a01f926-96af-453d-a75b-abc3e0f0abb3 |