Title:
Characterization of LDMOS Devices in the Deep Cryogenic Regime

dc.contributor.author Kashyap, Avinash S. en_US
dc.contributor.author Mantooth, H. A. en_US
dc.contributor.author Mojarradi, M. en_US
dc.contributor.author Mudholkar, M. en_US
dc.contributor.author Vo, T. en_US
dc.contributor.corporatename California Institute of Technology en_US
dc.contributor.corporatename University of Arkansas, Fayetteville. Dept. of Electrical Engineering en_US
dc.contributor.corporatename Jet Propulsion Laboratory (U.S.)
dc.date.accessioned 2009-01-20T20:14:45Z
dc.date.available 2009-01-20T20:14:45Z
dc.date.issued 2008-06-25
dc.description This presentation was part of the session : Extreme Environments en_US
dc.description Sixth International Planetary Probe Workshop en_US
dc.description.abstract LDMOS devices are increasingly gaining attention as they aid in easier integration with existing CMOS technologies. They are especially used in applications requiring higher operating voltages such as power management circuits and high power amplifiers. The Jet Propulsion Laboratory (JPL) has developed LDMOS transistors using the existing IBM 5 AM technology to be used primarily in high voltage current mirrors in sensor interface circuits. These circuits are to be deployed in future lunar missions as part of a remote health monitoring system-on-a-chip that monitors the conditions surrounding key systems on a spacecraft. This chip processes a wide variety of possible sensor inputs through an analog front end (wheatstone bridge, variable gain amplifier, filtering, and data conversion). Most cryogenic studies of MOSFETs focus on normal lateral transistors and not on LDMOS devices. The authors have characterized and studied the operation of these devices in the deep cryo regime (~- 100 C to - 250 C). Normally, the characteristics of lateral MOSFETs improve with decreasing temperature. However, the asymmetrical nature of LDMOS devices, owing to the presence of a lightly doped drift region, causes the behavior to deviate from the expected characteristics at deep cryo temperatures. For example, the output current is expected to increase with decreasing temperature, but our observations indicate that the current initially increases and then starts decreasing after a certain transition temperature. This is attributed to the carrier freeze-out phenomenon occurring in the drift region due to lower ionization energies available to the carriers. The paper will report results on the breakdown, transfer and output characteristics of the JPL LDMOS devices as temperature decreases and attempt to explain the observation with physical reasoning. en_US
dc.description.sponsorship Jet Propulsion Laboratory ; University of Arkansas en_US
dc.identifier.uri http://hdl.handle.net/1853/26425
dc.publisher Georgia Institute of Technology en_US
dc.relation.ispartofseries IPPW08. Extreme Environments en_US
dc.subject LDMOs en_US
dc.subject Cryogenic characterization en_US
dc.subject Carrier freeze-out en_US
dc.subject Laterally diffused metal oxide semiconductors
dc.title Characterization of LDMOS Devices in the Deep Cryogenic Regime en_US
dc.type Text
dc.type.genre Proceedings
dspace.entity.type Publication
local.contributor.corporatename Daniel Guggenheim School of Aerospace Engineering
local.contributor.corporatename College of Engineering
local.relation.ispartofseries International Planetary Probe Workshop (IPPW)
relation.isOrgUnitOfPublication a348b767-ea7e-4789-af1f-1f1d5925fb65
relation.isOrgUnitOfPublication 7c022d60-21d5-497c-b552-95e489a06569
relation.isSeriesOfPublication 6369d36f-9ab2-422f-a97e-4844b98f173b
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