Title:
Design for testability techniques and optimization algorithms for performance and functional testing of mult-chip module interconnections
Design for testability techniques and optimization algorithms for performance and functional testing of mult-chip module interconnections
| dc.contributor.advisor | Chatterjee, Abhijit | |
| dc.contributor.author | Pendurkar, Rajesh | en_US |
| dc.contributor.department | Electrical and Computer Engineering | en_US |
| dc.date.accessioned | 2007-09-26T14:24:51Z | |
| dc.date.available | 2007-09-26T14:24:51Z | |
| dc.date.issued | 1999-05 | en_US |
| dc.description | Dissertation made openly available per email from author, 1/5/2017 | |
| dc.description.degree | Ph.D. | en_US |
| dc.identifier.bibid | 503488 | en_US |
| dc.identifier.uri | http://hdl.handle.net/1853/16635 | |
| dc.publisher | Georgia Institute of Technology | en_US |
| dc.subject.lcsh | Multichip modules (Microelectronics) Testing | en_US |
| dc.title | Design for testability techniques and optimization algorithms for performance and functional testing of mult-chip module interconnections | en_US |
| dc.type | Text | |
| dc.type.genre | Dissertation | |
| dspace.entity.type | Publication | |
| local.contributor.advisor | Chatterjee, Abhijit | |
| local.contributor.corporatename | School of Electrical and Computer Engineering | |
| local.contributor.corporatename | College of Engineering | |
| relation.isAdvisorOfPublication | 01f2340e-40b6-449d-8f8a-80b6599c8ffb | |
| relation.isOrgUnitOfPublication | 5b7adef2-447c-4270-b9fc-846bd76f80f2 | |
| relation.isOrgUnitOfPublication | 7c022d60-21d5-497c-b552-95e489a06569 |
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