Title:
Methodical Approximate Hardware Design and Reuse
Methodical Approximate Hardware Design and Reuse
| dc.contributor.author | Yazdanbakhsh, Amir | |
| dc.contributor.author | Thwaites, Bradley | |
| dc.contributor.author | Park, Jongse | |
| dc.contributor.author | Esmaeilzadeh, Hadi | |
| dc.contributor.corporatename | Georgia Institute of Technology. College of Computing | en_US |
| dc.contributor.corporatename | Georgia Institute of Technology. School of Computer Science | en_US |
| dc.date.accessioned | 2014-01-31T21:56:23Z | |
| dc.date.available | 2014-01-31T21:56:23Z | |
| dc.date.issued | 2014 | |
| dc.description | Research areas: Programming Languages, Hardware Design | en_US |
| dc.description.abstract | Design and reuse of approximate hardware components—digital circuits that may produce inaccurate results—can potentially lead to significant performance and energy improvements. Many emerging error-resilient applications can exploit such designs provided approximation is applied in a controlled manner. This paper provides the design abstractions and semantics for methodical, modular, and controlled approximate hardware design and reuse. With these abstractions, critical parts of the circuit still carry the strict semantics of traditional hardware design, while flexibility is provided. We discuss these abstractions in the context of synthesizable register transfer level (RTL) design with Verilog. Our framework governs the application of approximation during the synthesis process without involving the designers in the details of approximate synthesis and optimization. Through high-level annotations, our design paradigm provides high-level control over where and to what degree approximation is applied. We believe that our work forms a foundation for practical approximate hardware design and reuse. | en_US |
| dc.embargo.terms | null | en_US |
| dc.identifier.uri | http://hdl.handle.net/1853/50775 | |
| dc.language.iso | en_US | en_US |
| dc.publisher | Georgia Institute of Technology | en_US |
| dc.relation.ispartofseries | SCS Technical Report ; GT-CS-14-01 | en_US |
| dc.subject | Approximate computing | en_US |
| dc.subject | Approximate hardware synthesis | en_US |
| dc.subject | Constraints | en_US |
| dc.subject | Hardware description languages (HDL) | en_US |
| dc.subject | Program safety analysis | en_US |
| dc.subject | Program specification | en_US |
| dc.subject | Programming language design | en_US |
| dc.subject | SoC design | en_US |
| dc.title | Methodical Approximate Hardware Design and Reuse | en_US |
| dc.type | Text | |
| dc.type.genre | Technical Report | |
| dspace.entity.type | Publication | |
| local.contributor.corporatename | College of Computing | |
| local.contributor.corporatename | School of Computer Science | |
| local.relation.ispartofseries | College of Computing Technical Report Series | |
| local.relation.ispartofseries | School of Computer Science Technical Report Series | |
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