Modeling and design for energy-efficient spintronic logic devices and circuits

Mousavi Iraei, Rouhollah

Title:

Modeling and design for energy-efficient spintronic logic devices and circuits

dc.contributor.advisor	Naeemi, Azad
dc.contributor.author	Mousavi Iraei, Rouhollah
dc.contributor.committeeMember	Kenney, James
dc.contributor.committeeMember	Davis, Jeffrey
dc.contributor.committeeMember	First, Phillip
dc.contributor.committeeMember	Jiang, Zhigang
dc.contributor.department	Electrical and Computer Engineering
dc.date.accessioned	2020-09-08T12:38:08Z
dc.date.available	2020-09-08T12:38:08Z
dc.date.created	2018-08
dc.date.issued	2018-05-09
dc.date.submitted	August 2018
dc.date.updated	2020-09-08T12:38:09Z
dc.description.abstract	The objective of the proposed research is the modeling and the design of energy-efficient and scalable novel spintronic devices. Over the past two decades, spintronic devices have achieved special status due to their advantages in terms of low-voltage operation, smaller footprint area, non-volatile memory, and compatibility with CMOS technology. To design efficient spin-based systems, researchers require the precise modeling of the physics of nanomagnets, piezoelectrics, thermal noise, and metallic nanowires. Using the models developed during the research, spintronic logic devices comprised of hybrid magnetic and piezoelectric structures are proposed. The delay, energy dissipation, and footprint area of the proposed devices are analyzed. Moreover, the proposed devices are used as building blocks to propose spin-based logic gates, pattern and image recognition circuits, long-range interconnects, interface circuits, and coupled-oscillators. The performance of the proposed circuits is benchmarked against CMOS and other spin-based circuits, which shows improved performance, especially in implementing non-Boolean applications and interface circuits.
dc.description.degree	Ph.D.
dc.format.mimetype	application/pdf
dc.identifier.uri	http://hdl.handle.net/1853/63481
dc.language.iso	en_US
dc.publisher	Georgia Institute of Technology
dc.subject	Spintronic
dc.subject	Logic devices
dc.subject	Machine learning
dc.subject	MRAM
dc.subject	All-spin logic device
dc.subject	Neural networks
dc.subject	Spin-transfer torque
dc.subject	Topological insulator
dc.subject	Transducer
dc.subject	CMOS
dc.subject	Spin-Hall effect
dc.subject	Magnetostriction
dc.subject	Magnetostrictive switching
dc.subject	ISHE
dc.subject	Inverse Rashba Edelstein Effect
dc.subject	Interconnects
dc.subject	Benchmarking
dc.subject	SPICE
dc.subject	Modeling
dc.subject	non-Boolean computation
dc.subject	Boolean logic
dc.subject	Spin current
dc.subject	Magnetization switching
dc.subject	Thermal noise
dc.subject	Oscillators
dc.subject	Coupled-oscillator
dc.subject	Image recognition
dc.subject	Pattern recognition
dc.subject	Piezoelectric
dc.title	Modeling and design for energy-efficient spintronic logic devices and circuits
dc.type	Text
dc.type.genre	Dissertation
dspace.entity.type	Publication
local.contributor.advisor	Naeemi, Azad
local.contributor.corporatename	School of Electrical and Computer Engineering
local.contributor.corporatename	College of Engineering
relation.isAdvisorOfPublication	6d1af007-99eb-4893-b4f9-e73991494499
relation.isOrgUnitOfPublication	5b7adef2-447c-4270-b9fc-846bd76f80f2
relation.isOrgUnitOfPublication	7c022d60-21d5-497c-b552-95e489a06569
thesis.degree.level	Doctoral