High-Q Integrated Inductors on Trenched Silicon Islands

dc.contributor.advisor Ayazi, Farrokh
dc.contributor.author Raieszadeh, Mina en_US
dc.contributor.committeeMember Allen, Mark G.
dc.contributor.committeeMember Laskar, Joy
dc.contributor.department Electrical and Computer Engineering en_US
dc.date.accessioned 2005-07-28T19:06:42Z
dc.date.available 2005-07-28T19:06:42Z
dc.date.issued 2005-04-12 en_US
dc.description.abstract This thesis reports on a new implementation of high quality factor (Q) copper (Cu) inductors on CMOS-grade (10-20ohm.cm) silicon (Si) substrates using a fully CMOS-compatible process. A low-temperature (less than300C) fabrication sequence is employed to reduce the loss of Si wafers at RF frequencies by trenching the Si substrate. The high aspect-ratio (30:1) trenches are subsequently bridged over or refilled with a low-loss material to close the open areas and to create a rigid low-loss island (Trenched Si Island) on which the inductors can be fabricated. The method reported here does not require air suspension of the inductors, resulting in mechanically-robust structures that are compatible with any packaging technology. The metal loss of inductors is reduced by electroplating thick (~20m) Cu layer. Fabricated inductors are characterized and modeled from S-parameter measurement. Measurement results are in good agreement with SONNET electromagnetic simulations. A one-turn 0.8nH Cu inductor fabricated on a Trenched Silicon Island (TSI) exhibits high Q of 71 at 8.75 GHz. Whereas, the identical inductor fabricated on a 20um thick silicon dioxide (SiO2) coated standard Si substrate has a maximum Q of 41 at 1.95GHz. Comparing the Q of inductors on TSI with that of other micromachined Si substrates reveals the significant effect of trenching the Si in reduction of the substrate loss. This thesis outlines the design, fabrication, characterization and modeling of spiral type Cu inductors on the TSIs. en_US
dc.description.degree M.S. en_US
dc.format.extent 3064545 bytes
dc.format.mimetype application/pdf
dc.identifier.uri http://hdl.handle.net/1853/6991
dc.language.iso en_US
dc.publisher Georgia Institute of Technology en_US
dc.subject Trenched silicon island en_US
dc.subject Low-loss substrate
dc.subject High-Q inductor
dc.subject CMOS-compatible
dc.subject.lcsh Metal oxide semiconductors, Complementary en_US
dc.subject.lcsh Electric inductors en_US
dc.subject.lcsh Copper en_US
dc.title High-Q Integrated Inductors on Trenched Silicon Islands en_US
dc.type Text
dc.type.genre Thesis
dspace.entity.type Publication
local.contributor.advisor Ayazi, Farrokh
local.contributor.corporatename School of Electrical and Computer Engineering
local.contributor.corporatename College of Engineering
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relation.isOrgUnitOfPublication 5b7adef2-447c-4270-b9fc-846bd76f80f2
relation.isOrgUnitOfPublication 7c022d60-21d5-497c-b552-95e489a06569
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