Title:
Self-Virtualized I/O: High Performance, Scalable I/O Virtualization in Multi-core Systems
Self-Virtualized I/O: High Performance, Scalable I/O Virtualization in Multi-core Systems
Author(s)
Raj, Himanshu
Ganev, Ivan Borissov
Schwan, Karsten
Xenidis, Jimi
Ganev, Ivan Borissov
Schwan, Karsten
Xenidis, Jimi
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Abstract
Virtualizing I/O subsystems and peripheral devices is an integral part of system virtualization. This paper advocates the notion of self-virtualized I/O (S-VIO). Specifically, it proposes a hypervisor-level abstraction that permits guest virtual machines to efficiently exploit the multi-core nature of future machines when interacting with virtualized I/O. The concrete instance of S-VIO developed and evaluated herein (1) provides virtual interfaces to an underlying physical device, the network interface, and (2) manages the way in which the device's physical resources are used by guest operating systems. The performance of this instance differs markedly depending on design choices that include (a) how the S-VIO abstraction is mapped to the underlying host- vs. device-resident resources, (b) the manner and extent to which it interacts with the HV, and (c) its ability to flexibly leverage the multi-core nature of modern computing platforms. A device-centric S-VIO realization yields a self-virtualized network device (SV-NIC) that provides high performance network access to guest virtual machines. Specific performance results show that for high-end network hardware using an IXP2400-based board, a virtual network interface (VIF) from the device-centric S-VIO realization provides 77% more throughput and 53% less latency compared to the VIF from a host-centric S-VIO realization. For 8 VIFs, the aggregate throughput (latency) for device-centric version is 103% more (39% less) compared to the host-centric version. The aggregate throughput and latency of the VIFs scales with guest VMs, ultimately limited by the amount of physical computing resources available on the host platform and device, such as number of cores. The paper also discusses architectural considerations for implementing self-virtualized devices in future multi-core systems.
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Date Issued
2006
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386763 bytes
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Text
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Technical Report