Title:
High-density capacitor array fabrication on silicon substrates
High-density capacitor array fabrication on silicon substrates
| dc.contributor.advisor | Tummala, Rao R. | |
| dc.contributor.author | Sethi, Kanika | en_US |
| dc.contributor.committeeMember | Gerhardt, Rosario | |
| dc.contributor.committeeMember | Raj, Pulugurtha Markondeya | |
| dc.contributor.department | Materials Science and Engineering | en_US |
| dc.date.accessioned | 2011-03-04T21:02:07Z | |
| dc.date.available | 2011-03-04T21:02:07Z | |
| dc.date.issued | 2010-11-19 | en_US |
| dc.description.abstract | System integration and miniaturization demands are driving integrated thin film capacitor technologies with ultra-high capacitance densities for power supply integrity and efficient power management. The emerging need for voltage conversion and noise-free power supply in bioelectronics and portable consumer products require ultra high-density capacitance of above 100 μF/cm2 with BDV 16-32 V ,independent capacitor array terminals and non-polar dielectrics. The aim of this research,therefore, is to explore a new silicon- compatible thin film nanoelectrode capacitor technology that can meet all these demands. The nanoelectrode capacitor paradigm has two unique advances. The first advance is to achieve ultra-high surface area thin film electrodes by sintering metallic particles directly on a silicon substrate at CMOS- compatible temperatures. The second advance of this study is to conformally- deposit medium permittivity dielectrics over such particulate nanoelectrodes using Atomic Layer Deposition (ALD) process. Thin film copper particle nanoelectrode with open-porous structure was achieved by choosing a suitable phosphate-ester dispersant, solvent and a sacrificial polymer for partial sintering of copper particles to provide a continuous high surface area electrode. Capacitors with conformal ALD alumina as the dielectric and Polyethylene dioxythiophene (PEDT) as the top electrode showed 30X enhancement in capacitance density for a 20-30 micron copper particulate bottom electrode and 150X enhancement of capacitance density for a 75 micron electrode. These samples were tested for their mechanical and electrical properties by using characterization techniques such as SEM, EDS, I-V and C-V plots. A capacitance density of 30 μF/cm2 was demonstrated using this approach. The technology is extensible to much higher capacitance densities with better porosity control, reduction in particle size and higher permittivity dielectrics. | en_US |
| dc.description.degree | M.S. | en_US |
| dc.identifier.uri | http://hdl.handle.net/1853/37259 | |
| dc.publisher | Georgia Institute of Technology | en_US |
| dc.subject | Capacitors | en_US |
| dc.subject | ALD | en_US |
| dc.subject | PEDOT | en_US |
| dc.subject | Copper | en_US |
| dc.subject | Sintering | en_US |
| dc.subject | High-density | en_US |
| dc.subject | Capacitance | en_US |
| dc.subject.lcsh | Capacitors | |
| dc.subject.lcsh | Ferroelectric thin films | |
| dc.subject.lcsh | Nanostructured materials | |
| dc.title | High-density capacitor array fabrication on silicon substrates | en_US |
| dc.type | Text | |
| dc.type.genre | Thesis | |
| dspace.entity.type | Publication | |
| local.contributor.advisor | Tummala, Rao R. | |
| local.contributor.corporatename | School of Materials Science and Engineering | |
| local.contributor.corporatename | College of Engineering | |
| relation.isAdvisorOfPublication | fe05ddb2-e957-4584-ac88-58a197df62aa | |
| relation.isOrgUnitOfPublication | 21b5a45b-0b8a-4b69-a36b-6556f8426a35 | |
| relation.isOrgUnitOfPublication | 7c022d60-21d5-497c-b552-95e489a06569 |
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