Near-memory primitive support and infratructure for sparse algorithm
Author(s)
Garg, Kartikay
Advisor(s)
Yalamanchili, Sudhakar
Young, Jeffrey
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Abstract
This thesis introduces an approach to solving the problem of memory latency performance
penalties with traditional accelerators. By introducing simple near-data-processing
(NDP) accelerators for primitives such as SpMV (Sparse Matrix Multiplication of Vectors)
and DGEMM (Double Precision Dense Matrix Multiplication) kernels, applications can
achieve a considerable performance boost. We evaluate our work for SuperLU application for the HPC community.
Thesis Statement: Reevaluating core primitives such as DGEMM, SCATTER, and
GATHER for 3D-stacked PIM architectures that incorporate re-configurable fabrics can
deliver multi-fold performance improvements for SUPERLU and other sparse algorithms.
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Date
2017-04-28
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Thesis