Title:
Characterization_and_mitigation_of_ADC_noise_by_reference_tuning__in_RRAM_based_CiM
Characterization_and_mitigation_of_ADC_noise_by_reference_tuning__in_RRAM_based_CiM
Author(s)
Wei, Ying-Hao
Advisor(s)
Raychowdhury, Arijit
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Abstract
In response to the escalating demand for low-power and high-compute capabilities, the exploration of Compute-in-Memory architecture for non-volatile memory has emerged as a promising avenue. However, the integration of circuits sensitive to reference voltage in this architecture necessitates addressing inherent challenges to uphold precision. Without altering the fundamental architecture, we systematically assess the accuracy of Multiply-Accumulate operations across diverse parameters, including reference scope, varied BL voltage, and different accumulation settings. To quantify inaccuracies, we modeled noise through effective bits, obtained by fitting actual response. Additionally, we affirm the absence of read disturb in the configuration. Subsequently, our model is applied to various neural networks encompassing supervised and reinforcement learning. Results indicate that intricate networks exhibit heightened susceptibility to noise, necessitating reference tuning at the per-ADC level, as for other simple networks, the per-module referencing will be sufficient. Furthermore, our findings highlight that reinforcement learning is more susceptible to noise compared to supervised learning.
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Date Issued
2024-01-08
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