Title:
Timing Analysis for Preemptive Multi-tasking Real-Time Systems with Caches

dc.contributor.author Tan, Yudong en_US
dc.contributor.author Mooney, Vincent John, III
dc.date.accessioned 2005-06-17T17:35:19Z
dc.date.available 2005-06-17T17:35:19Z
dc.date.issued 2004 en_US
dc.description.abstract In this paper, we propose an approach to estimate the Worst Case Response Time (WCRT) of each task in a preemptive multi-tasking single-processor real-time system with an L1 cache. The approach combines inter-task cache eviction analysis and intra-task cache access analysis to estimate the number of cache lines that can possibly be evicted by the preempting task and also be accessed again by the preempted task after preemptions (thus requiring the preempted task to reload the cache line(s)). This cache reload delay caused by preempting tasks is then incorporated into WCRT analysis. Two sets of applications are used to test our approach. Each set of applications contains three tasks. The experimental results show that our approach can tighten the WCRT estimate by 38% (1.6X) to 56% (2.3X) over prior state-of-the-art. en_US
dc.format.extent 165268 bytes
dc.format.mimetype application/pdf
dc.identifier.uri http://hdl.handle.net/1853/6487
dc.language.iso en_US
dc.publisher Georgia Institute of Technology en_US
dc.relation.ispartofseries CC Technical Report; GIT-CC-04-02 en_US
dc.subject Caching
dc.subject Response time
dc.subject Real-time systems
dc.title Timing Analysis for Preemptive Multi-tasking Real-Time Systems with Caches en_US
dc.type Text
dc.type.genre Technical Report
dspace.entity.type Publication
local.contributor.author Mooney, Vincent John, III
local.contributor.corporatename College of Computing
local.relation.ispartofseries College of Computing Technical Report Series
relation.isAuthorOfPublication 1068070d-f7e9-4b9c-9be6-72023d13e2a1
relation.isOrgUnitOfPublication c8892b3c-8db6-4b7b-a33a-1b67f7db2021
relation.isSeriesOfPublication 35c9e8fc-dd67-4201-b1d5-016381ef65b8
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