Title:
Guided-wave Optical Interconnections Embedded Within A Microelectronic Wafer-level Batch Package

dc.contributor.patentcreator Mule?, (atlanta, Ga)
dc.contributor.patentcreator Patel, Chirag
dc.contributor.patentcreator Meindl, James D.
dc.contributor.patentcreator Gaylord, Thomas K.
dc.contributor.patentcreator Glytsis, Elias N.
dc.contributor.patentcreator Martin, Kevin P.
dc.contributor.patentcreator Schultz, Stephen M.
dc.contributor.patentcreator Bakir, Muhannad
dc.contributor.patentcreator Reed, Hollie
dc.contributor.patentcreator Kohl, Paul
dc.date.accessioned 2017-05-12T14:27:59Z
dc.date.available 2017-05-12T14:27:59Z
dc.date.filed 2/11/2002
dc.date.issued 8/31/2004
dc.description.abstract Wafer-level electronic packages having waveguides and methods of fabricating chip-level electronic packages having waveguides are disclosed. A representative chip-level electronic package includes at least one waveguide having a waveguide core. In addition, another representative chip-level electronic package includes a waveguide having an air-gap cladding layer around a portion of the waveguide core. A representative method for fabricating a chip-level electronic package includes: providing a substrate having a passivation layer disposed on the substrate; disposing a waveguide core on a portion of the passivation layer; disposing a first sacrificial layer onto at least one portion of the passivation layer and the waveguide core; disposing an overcoat layer onto the passivation layer and the first sacrificial layer; and removing the first sacrificial layer to define an air-gap cladding layer within the overcoat polymer layer and around a portion of the waveguide core.
dc.description.assignee Georgia Tech Research Corporation
dc.identifier.cpc G02B6/10
dc.identifier.cpc G02B6/12002
dc.identifier.cpc G02B6/1221
dc.identifier.patentapplicationnumber 10/074420
dc.identifier.patentnumber 6785458
dc.identifier.uri http://hdl.handle.net/1853/57540
dc.identifier.uspc 385/131
dc.title Guided-wave Optical Interconnections Embedded Within A Microelectronic Wafer-level Batch Package
dc.type Text
dc.type.genre Patent
dspace.entity.type Publication
local.contributor.corporatename Georgia Institute of Technology
local.relation.ispartofseries Georgia Tech Patents
relation.isOrgUnitOfPublication cc30e153-7a64-4ae2-9b1d-5436686785e3
relation.isSeriesOfPublication 0f49c79d-4efb-4bd9-b060-5c7f9191b9da
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