Title:
Economic lot scheduling for multiple products on parallel processors
Economic lot scheduling for multiple products on parallel processors
dc.contributor.advisor | Johnson, Lynwood A. | |
dc.contributor.author | Carreno, Jose Juan | en_US |
dc.contributor.department | Industrial engineering | en_US |
dc.date.accessioned | 2008-11-10T15:11:43Z | |
dc.date.available | 2008-11-10T15:11:43Z | |
dc.date.issued | 1981-08 | en_US |
dc.description.degree | Ph.D. | en_US |
dc.identifier.bibid | 167791 | en_US |
dc.identifier.uri | http://hdl.handle.net/1853/25481 | |
dc.publisher | Georgia Institute of Technology | en_US |
dc.rights | Access restricted to authorized Georgia Tech users only. | en_US |
dc.subject.lcsh | Production control | en_US |
dc.subject.lcsh | Production scheduling | en_US |
dc.subject.lcsh | Operations research | en_US |
dc.subject.lcsh | Multiprocessors | en_US |
dc.title | Economic lot scheduling for multiple products on parallel processors | en_US |
dc.type | Text | |
dc.type.genre | Dissertation | |
dspace.entity.type | Publication | |
local.contributor.corporatename | H. Milton Stewart School of Industrial and Systems Engineering | |
local.contributor.corporatename | College of Engineering | |
relation.isOrgUnitOfPublication | 29ad75f0-242d-49a7-9b3d-0ac88893323c | |
relation.isOrgUnitOfPublication | 7c022d60-21d5-497c-b552-95e489a06569 |
Files
Original bundle
1 - 1 of 1
No Thumbnail Available
- Name:
- carreno_jose_j_198108_phd_167791.pdf
- Size:
- 3.34 MB
- Format:
- Adobe Portable Document Format
- Description: