Title:
Cryogenic operation of silicon-germanium heterojunction bipolar transistors and its relation to scaling and optimization

dc.contributor.advisor Cressler, John D.
dc.contributor.author Yuan, Jiahui en_US
dc.contributor.committeeMember Hao Min Zhou
dc.contributor.committeeMember Papapolymerou, John
dc.contributor.committeeMember Paul G Steffes
dc.contributor.committeeMember Shyh-Chiang Shen
dc.contributor.department Electrical and Computer Engineering en_US
dc.date.accessioned 2010-06-10T15:19:51Z
dc.date.available 2010-06-10T15:19:51Z
dc.date.issued 2010-02-04 en_US
dc.description.abstract The objective of the proposed work is to study the behavior of SiGe HBTs at cryogenic temperatures and its relation to device scaling and optimization. Not only is cryogenic operation of these devices required by space missions, but characterizing their cryogenic behavior also helps to investigate the performance limits of SiGe HBTs and provides essential information for further device scaling. Technology computer aided design (TCAD) and sophisticated on-wafer DC and RF measurements are essential in this research. Drift-diffusion (DD) theory is used to investigate a novel negative differential resistance (NDR) effect and a collector current kink effect in first-generation SiGe HBTs at deep cryogenic temperatures. A theory of positive feedback due to the enhanced heterojunction barrier effect at deep cryogenic temperatures is proposed to explain such effects. Intricate design of the germanium and base doping profiles can greatly suppress both carrier freezeout and the heterojunction barrier effect, leading to a significant improvement in the DC and RF performance for NASA lunar missions. Furthermore, cooling is used as a tuning knob to better understand the performance limits of SiGe HBTs. The consequences of cooling SiGe HBTs are in many ways similar to those of combined vertical and lateral device scaling. A case study of low-temperature DC and RF performance of prototype fourth-generation SiGe HBTs is presented. This study summarizes the performance of all three prototypes of these fourth-generation SiGe HBTs within the temperature range of 4.5 to 300 K. Temperature dependence of a fourth-generation SiGe CML gate delay is also examined, leading to record performance of Si-based IC. This work helps to analyze the key optimization issues associated with device scaling to terahertz speeds at room temperature. As an alternative method, an fT -doubler technique is presented as an attempt to reach half-terahertz speeds. In addition, a roadmap for terahertz device scaling is given, and the potential relevant physics associated with future device scaling are examined. Subsequently, a novel superjunction collector design is proposed for higher breakdown voltages. Hydrodynamic models are used for the TCAD studies that complete this part of the work. Finally, Monte Carlo simulations are explored in the analysis of aggressively-scaled SiGe HBTs. en_US
dc.description.degree Ph.D. en_US
dc.identifier.uri http://hdl.handle.net/1853/33837
dc.publisher Georgia Institute of Technology en_US
dc.subject Heterojunction bipolar transistor en_US
dc.subject SiGe HBT en_US
dc.subject Terahertz speed en_US
dc.subject Cryogenic electronics en_US
dc.subject Silicon germanium en_US
dc.subject.lcsh Bipolar transistors
dc.subject.lcsh Heterojunctions
dc.subject.lcsh Cryoelectronics
dc.subject.lcsh Low temperature engineering
dc.title Cryogenic operation of silicon-germanium heterojunction bipolar transistors and its relation to scaling and optimization en_US
dc.type Text
dc.type.genre Dissertation
dspace.entity.type Publication
local.contributor.advisor Cressler, John D.
local.contributor.corporatename School of Electrical and Computer Engineering
local.contributor.corporatename College of Engineering
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relation.isOrgUnitOfPublication 5b7adef2-447c-4270-b9fc-846bd76f80f2
relation.isOrgUnitOfPublication 7c022d60-21d5-497c-b552-95e489a06569
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