Title:
Compliant Off-chip Interconnects

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dc.contributor.patentcreator Zhu, Qi
dc.contributor.patentcreator Ma, Lunya
dc.contributor.patentcreator Sitaraman, Suresh K.
dc.date.accessioned 2017-05-12T14:27:59Z
dc.date.available 2017-05-12T14:27:59Z
dc.date.filed 2/25/2002
dc.date.issued 8/31/2004
dc.description.abstract Electronic packages having compliant off-chip interconnects and methods of fabricating compliant off-chip interconnects are disclosed. A representative electronic package includes a substrate and a free-standing compliant off-chip interconnect. The free-standing compliant off-chip interconnect includes a first free-standing arcuate structure that is substantially parallel to the substrate. In addition, the method of fabricating free-standing arcuate structure compliant off-chip interconnects includes: depositing an arcuate structure compliant off-chip interconnect material; and forming the free-standing arcuate structure compliant off-chip interconnect.
dc.description.assignee Georgia Tech Research Corporation
dc.identifier.cpc H01L23/49811
dc.identifier.cpc H01L2924/09701
dc.identifier.cpc H01L2924/0002
dc.identifier.patentapplicationnumber 10/083782
dc.identifier.patentnumber 6784378
dc.identifier.uri http://hdl.handle.net/1853/57539
dc.identifier.uspc 174/267
dc.title Compliant Off-chip Interconnects
dc.type Text
dc.type.genre Patent
dspace.entity.type Publication
local.contributor.corporatename Georgia Institute of Technology
local.relation.ispartofseries Georgia Tech Patents
relation.isOrgUnitOfPublication cc30e153-7a64-4ae2-9b1d-5436686785e3
relation.isSeriesOfPublication 0f49c79d-4efb-4bd9-b060-5c7f9191b9da
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