Title:
Parallel Shortest Path Algorithms for Solving Large-Scale Instances
Parallel Shortest Path Algorithms for Solving Large-Scale Instances
dc.contributor.author | Madduri, Kamesh | |
dc.contributor.author | Bader, David A. | |
dc.contributor.author | Berry, Jonathan W. | |
dc.contributor.author | Crobak, Joseph R. | |
dc.date.accessioned | 2007-05-24T17:23:16Z | |
dc.date.available | 2007-05-24T17:23:16Z | |
dc.date.issued | 2006-08-30 | |
dc.description.abstract | We present an experimental study of parallel algorithms for solving the single source shortest path problem with non-negative edge weights (NSSP) on large-scale graphs. We implement Meyer and Sander's Δ-stepping algorithm and report performance results on the Cray MTA-2, a multithreaded parallel architecture. The MTA-2 is a high-end shared memory system offering two unique features that aid the efficient implementation of irregular parallel graph algorithms: the ability to exploit fine-grained parallelism, and low-overhead synchronization primitives. Our implementation exhibits remarkable parallel speedup when compared with a competitive sequential algorithm, for low-diameter sparse graphs. For instance, Δ-stepping on a directed scale-free graph of 100 million vertices and 1 billion edges takes less than ten seconds on 40 processors of the MTA-2, with a relative speedup of close to 30. To our knowledge, these are the first performance results of a parallel NSSP problem on realistic graph instances in the order of billions of vertices and edges. | en_US |
dc.identifier.uri | http://hdl.handle.net/1853/14449 | |
dc.language.iso | en_US | en_US |
dc.publisher | Georgia Institute of Technology | en_US |
dc.relation.ispartofseries | CSE Technical Reports; GT-CSE-06-19 | en_US |
dc.subject | Multithreaded architecture | en_US |
dc.subject | Non-negative edge weights (NSSP) | en_US |
dc.subject | Parallel algorithms | en_US |
dc.subject | Shared memory system | en_US |
dc.title | Parallel Shortest Path Algorithms for Solving Large-Scale Instances | en_US |
dc.type | Text | |
dc.type.genre | Technical Report | |
dspace.entity.type | Publication | |
local.contributor.corporatename | College of Computing | |
local.contributor.corporatename | School of Computational Science and Engineering | |
local.relation.ispartofseries | College of Computing Technical Report Series | |
local.relation.ispartofseries | School of Computational Science and Engineering Technical Report Series | |
relation.isOrgUnitOfPublication | c8892b3c-8db6-4b7b-a33a-1b67f7db2021 | |
relation.isOrgUnitOfPublication | 01ab2ef1-c6da-49c9-be98-fbd1d840d2b1 | |
relation.isSeriesOfPublication | 35c9e8fc-dd67-4201-b1d5-016381ef65b8 | |
relation.isSeriesOfPublication | 5a01f926-96af-453d-a75b-abc3e0f0abb3 |