Person:
Sitaraman, Suresh K.

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https://hdl.handle.net/1853/71712
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    Development of compliant free-standing structures for sub 32-nm multi-core ICs
    (Georgia Institute of Technology, 2012-11) Sitaraman, Suresh K. ; Swaminathan, Madhavan
    With the introduction of on-chip low-K dielectric materials, it is increasingly important to reduce on-chip stresses so that the low-K dielectric material will not crack or delaminate. One way to reduce the thermo-mechanical stresses is to introduce compliant structures between the die and the substrate and thus to decouple the die from the substrate. Decoupling the die from the substrate or the substrate from the board by means of mechanically compliant interconnects will reduce stresses created by the coefficient of thermal expansion mismatch. A decoupled diesubstrate or substrate-board interface will allow the different components to expand or contract differently without inducing high stresses in the components. In this work, we report the design, fabrication, modeling, and characterization of innovative multi-path fan-shaped off-chip compliant interconnects. The proposed interconnects can be fabricated at the wafer-level and are cost-effective, can be of fine pitch and scalable, and will have redundant electrical paths.
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    Innovative off-chip interconnects for 45-nm and sub-45-nm node ICs
    (Georgia Institute of Technology, 2009-07-14) Sitaraman, Suresh K.
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    FEM Modeling of Temperature Distribution of a Flip-Chip No-Flow Underfill Package During Solder Reflow Process
    (Georgia Institute of Technology, 2004-01) Wong, C. P. ; Zhang, Zhuqing ; Sitaraman, Suresh K.
    Flip chip on organic substrate has relied on underfill to redistribute the thermomechanical stress and to enhance the solder joint reliability. However, the conventional flip-chip underfill process involves multiple process steps and has become the bottleneck of the flip-chip process. The no-flow underfill is invented to simplify the flip-chip underfill process and to reduce the packaging cost. The no-flow underfill process requires the underfill to possess high curing latency to avoid gelation before solder reflow so to ensure the solder interconnect. Therefore, the temperature distribution of a no-flow flip-chip package during the solder reflow process is important for high assembly yield. This paper uses the finite-element method (FEM) to model the temperature distribution of a flip-chip no-flow underfill package during the solder reflow process. The kinetics of underfill curing is established using an autocatalytic reaction model obtained by DSC studies. Two approaches are developed in order to incorporate the curing kinetics of the underfill into the FEM model using iteration and a loop program. The temperature distribution across the package and across the underfill layer is studied. The effect of the presence of the underfill fillet and the influence of the chip dimension on the temperature difference in the underfill layer is discussed. The influence of the underfill curing kinetics on the modeling results is also evaluated.
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    Thermal and Mechanical Characterization of ViaLux™ 81: A Novel Epoxy Photo-Dielectric Dry Film (PDDF) for Microvia Applications
    (Georgia Institute of Technology, 2001-09) Wong, C. P. ; Dunne, Rajiv Carl ; Sitaraman, Suresh K. ; Luo, Shijian ; Estes, William E. ; Periyasamy, Mookkan ; Coburn, John
    Multilayered high density interconnect (HDI) processing on organic substrates typically introduces warpage and residual stresses. The magnitude of the warpage and the residual stresses depends on, among other factors, the processing temperatures and the thermomechanical properties of the dielectric and substrate materials. In this work, a prospective epoxy-based dielectric material for such sequentially built up (SBU) high density- interconnect printed wiring boards (HDI-PWB) is considered. The polymer is a photo-dielectric dry film (PDDF) material called ViaLux™ 81, which exhibits a complicated curing behavior due to the long lifetime of the cationic photoinitiators generated by ultraviolet (UV) exposure. The objectives of this work are 1) to conduct differential scanning calorimetry (DSC) experiments and develop a cure kinetics model; 2) to develop a cure shrinkage model based on thermal and chemical shrinkage experiments; 3) to determine the thermomechanical properties of partially and fully cured Vialux™ 81 dry film. All of these experimental characterizations are necessary to select suitable process parameters and to obtain a consistent product with the desired physical and mechanical properties.
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    Low-cost mixed mode module: Computer-aided mechanical design (MCAD)
    (Georgia Institute of Technology, 1999) Sitaraman, Suresh K.