Gaylord, Thomas K.

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Now showing 1 - 6 of 6
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    Polylithic integration of electrical and optical interconnect technologies for gigascale fiber-to-the-chip communication
    (Georgia Institute of Technology, 2005-08) Mule’, Anthony V. ; Villalaz, Ricardo A. ; Joseph, Paul Jayachandran ; Naeemi, Azad ; Kohl, Paul A. ; Gaylord, Thomas K. ; Meindl, James D.
    Polylithic integration of electrical and optical interconnect technologies is presented as a solution for merging silicon CMOS and compound semiconductor optoelectronics. In contrast to monolithic and hybrid integration technologies, polylithic integration allows for the elimination of optoelectronic and integrated optic device-related processing from silicon CMOS manufacturing. Printed wiring board-level and compound semiconductor chip-level waveguides terminated with volume grating couplers facilitate bidirectional optical communication, where fiber-to-board and board-to-chip optical coupling occurs through a two-grating (or grating-to-grating) coupling path. A 27% increase in the electrical signal I/O projected by and 33% increase in the number of substrate-level electrical signal interconnect layers implied by the International Technology Roadmap for Semiconductors (ITRS) projections for the 32-nm technology generation are required to facilitate 10 Tb/s aggregate bidirectional fiber-to-the-chip communication. Buried air-gap channels provide for the routing of chip or board-level encapsulated air-clad waveguides for minimum crosstalk and maximum interconnect density. Optical signals routed on-board communicate with on-chip volume grating couplers embedded as part of a wafer-level batch package technology exhibiting compatible electrical and optical input/output interconnects. Measurements of grating-to-grating coupling reveal 31% coupling efficiency between two slab, nonoptimized, nonfocusing volume grating couplers.
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    Photopolymer-based diffractive and MMI waveguide couplers
    (Georgia Institute of Technology, 2004-11) Mule’, Anthony V. ; Villalaz, Ricardo ; Gaylord, Thomas K. ; Meindl, James D.
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    Quasi-free-space optical coupling between diffraction grating couplers fabricated on independent substrates
    (Georgia Institute of Technology, 2004-10) Mulé, Anthony V. ; Villalaz, Ricardo A. ; Gaylord, Thomas K. ; Meindl, James D.
    Optical coupling between preferential-order volume diffraction grating couplers fabricated on independent substrates is demonstrated. The coupling efficiency between gratings is quantified as a function of both grating and waveguide fabrication technology and relative angular position of the two substrates. A maximum grating-to-grating coupling efficiency of 31% is reported for coupling between two nonoptimized, nonfocusing, unpatterned volume grating couplers.
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    Optical and electrical interconnect partition length based on chip-to-chip bandwidth maximization
    (Georgia Institute of Technology, 2004-04) Naeemi, Azad ; Xu, Jianping ; Mule’, Anthony V. ; Gaylord, Thomas K. ; Meindl, James D.
    The lengths beyond which board-level optical waveguides are capable of transferring a larger number of bits per second than electrical interconnects are found for various technology generations. As technology scales from the 130-nm technology node to the 45-nm technology node, the partition length falls from 29 to 8.3 cm due to seven times larger driver-switching frequency and 40% finer waveguide pitches.
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    Sea of polymer pillars: Compliant wafer-level electrical-optical chip I/O interconnections
    (Georgia Institute of Technology, 2003-11) Bakir, Muhannad S. ; Gaylord, Thomas K. ; Martin, Kevin P. ; Meindl, James D.
    An electrical–optical chip input–output (I/O) interconnection technology called sea of polymer pillars (SoPP) is presented. SoPP provides highly process-integrated and mechanically flexible (compliant) electrical–optical die-to-board interconnections that mitigate thermo-mechanical expansion mismatches. The I/O density of SoPP exceeds 10⁵ /cm². The compliance of the polymer pillars is shown to be 3–5 µm/mN. Approximately 50% input optical coupling efficiency into a volume grating coupler through a set of polymer pillars is demonstrated.
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    Chip-to-Module Interconnections Using "Sea of Leads" Technology
    (Georgia Institute of Technology, 2003-01) Bakir, Muhannad S. ; Reed, Hollie A. ; Mulé, Anthony V. ; Jayachandran, Joseph Paul ; Kohl, Paul A. ; Martin, Kevin P. ; Gaylord, Thomas K. ; Meindl, James D.
    The drive toward higher density and higher performance in integrated circuits creates a need to keep interconnects short and eliminate layers of packaging. In this article, we propose a novel, ultrahigh-density (exceeding 10⁴leads per cm²), compliant, wafer-level, input/output interconnection technology called "sea of leads" as a key enabling technology for future high-performance microsystems. The mechanical compliance is addressed through slippery leads (leads released from the surface) and embedded air gaps.The ability to fabricate embedded air gaps has enabled the integration of optical interconnects with high index-of-refraction mismatches between the core and cladding.