(Georgia Institute of Technology, 2002)
Banakar, Rajeshwari; Ekpanyapong, Mongkol; Puttaswamy, Kiran; Rabbah, Rodric Michel; Balakrishnan, M.; Mooney, Vincent John, III; Palem, Krishna V.
In this paper a system level energy model called TRIREME, is presented for HPL-PD microarchitecture which is used in Trimaran Compiler framework studies. The number of accesses for the various computational units are obtained from the trimaran framework, which gives the performance estimates also. We focus on the details of the HPL PD at the microarchitectural level and how the energy models for the processor are constructed. Our system level energy model can be used in Trimaran framework for energy-aware computing, to validate the compiler techniques for the benefits of energy saving due to introduction of a specific compiler optimization.
(Georgia Institute of Technology, 2002)
Palem, Krishna V.; Rabbah, Rodric Michel; Mooney, Vincent John, III; Korkmaz, Pinar; Puttaswamy, Kiran
In this paper, we provide a novel compile-time data remapping algorithm that runs in linear time. This remapping algorithm is the first fully automatic approach applicable to pointer-intensive dynamic applications. We show that data remapping can be used to significantly
reduce the energy consumed as well as the memory size needed to meet a user-specified performance goal (i.e., execution time) -- relative to the same application executing without being remapped. These twin advantages afforded by a remapped program -- improved cache and energy
needs -- constitute a key step in a framework for design space exploration: for any given performance goal, remapping allows the user
to reduce the primary and secondary cache size by 50%, yielding a concomitant energy savings of 57%. Additionally, viewed as a compiler optimization for a fixed processor, we show that remapping improves the energy consumed by the cache subsystem by 25%. All of the above
savings are in the context of the cache subsystem in isolation. We also show that remapping yields an average 20% energy saving for an ARM-like processor and cache subsystem. All of our improvements are achieved in the context of DIS, OLDEN and SPEC2000 pointer-centric benchmarks.